Current Research

Members of the Embedded Signal Processing Laboratory (ESPL) have been researching discrete multitone transceiver design, esp. for ADSL transceivers, since Fall 1998. We have been primarily focusing on equalization, which can provide up to 2 Mbps of the target 8 Mbps in downstream ADSL. Our work in equalization for single connection ADSL transceivers has reached a natural conclusion. Our results have been shipping in commercial transceivers for some time. Our current work involves multi-input multi-output discrete multitone modulation and is being conducted by Mr. Daifeng Wang and Mr. Ian Wong.

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