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<body lang=EN-US link=blue vlink=blue style='tab-interval:.5in'> <div class=WordSection1> <h2><span style='mso-fareast-font-family:"Times New Roman";mso-bidi-font-family: "Times New Roman"'>David Z. Pan's Biography <o:p></o:p></span></h2> <div class=MsoNormal align=center style='text-align:center'><span style='mso-bidi-font-family:"Times New Roman"'> <hr size=3 width="100%" align=center> </span></div> <p>David Z. Pan received his B.S. degree from Peking University, and his M.S. and Ph.D. degrees from University of California, Los Angeles (UCLA). From 2000 to 2003, he was a Research Staff Member with the <a href="http://www.watson.ibm.com/">IBM T. J. Watson Research Center</a>, <ns0:place><span><ns0:City><span>Yorktown Heights</ns0:City></span>, <ns0:State><span>NY</ns0:State></span></ns0:place></span>. He has been an Assistant Professor (2003-2008), Associate Professor (2008-2013), Professor (2013-), and Engineering Foundation Endowed Professor (2014-) with the Department of Electrical and Computer Engineering, The <ns0:PlaceType><span>University</ns0:PlaceType></span> of <ns0:PlaceName><span>Texas</ns0:PlaceName></span> at <ns0:City><span><ns0:place><span>Austin</ns0:place></span></ns0:City></span>. His research interests include cross-layer nanometer IC design for manufacturability/reliability, new frontiers of physical design, and CAD for emerging technologies such as 3D-IC, bio, and nanophotonics. He has published over 300 refereed journal and conference papers, and is the holder of 8 <ns0:country-region><span><ns0:place><span>U.S.</ns0:place></span></ns0:country-region></span> Patents.<span style="mso-spacerun:yes"> </span>He has graduated 23 PhD students at UT Austin, who are now taking key academic and industry roles.</p> <p>He has served as a Senior Associate Editor of <i style='mso-bidi-font-style: normal'>ACM Transactions on Design Automation of Electronic Systems </i>(TODAES) and an Associate Editor of <i style='mso-bidi-font-style:normal'>IEEE Design &amp; Test</i>, <i style='mso-bidi-font-style:normal'>IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems </i>(TCAD), <i style='mso-bidi-font-style:normal'>IEEE Transactions on Very Large Scale Integration Systems</i> (TVLSI), <i style='mso-bidi-font-style:normal'>IEEE Transactions on Circuits and Systems I: Regular Papers</i> (TCAS-I), and <i style='mso-bidi-font-style:normal'>IEEE Transactions on Circuits and Systems II: Express Briefs</i> (TCAS-II), <i style='mso-bidi-font-style:normal'>Science China Information Science</i> (SCIS), <i style='mso-bidi-font-style:normal'>Journal of Computer Science and Technology</i> (JCST), and the<i style='mso-bidi-font-style: normal'> IEEE CAS Society Newsletter</i>. He has served as the IEEE CANDE Committee Chair, Program/General Chair of ISPD 2007/2008, TPC Chair of ASP-DAC 2017, Program Chair of ICCAD 2018, Tutorial Chair of DAC 2014, among others. He has served in the working group of the International Technology Roadmap for Semiconductor (ITRS). He has also served as an advisor or consultant to various companies including Cadence, Cooley LLP, Fish &amp; Richardson, Pyxis, and Tabula. </p> <p>He has received a number of awards for his research contributions and professional services, including the <a href="https://www.src.org/award/tech-excellence/">SRC 2013 Technical Excellence Award</a>, <a href="http://dac.com/content/awards-banquet">DAC Top 10 Author in Fifth Decade</a>, DAC Prolific Author Award, <span style='mso-bidi-font-weight: bold'><a href="http://www.aspdac.com/aspdac2015/awards/">ASP-DAC Frequently Cited Author Award</a></span>, 15 Best Paper Awards (Integration - the VLSI Journal 2018, HOST 2017, SPIE 2016, ISPD 2014, ICCAD 2013, ASPDAC 2012, ISPD 2011, IBM Research 2010 Pat Goldberg Memorial Best Paper Award in CS/EE/Math, ASPDAC 2010, DATE 2009, ICICDT 2009, SRC Techcon in 1998, 2007, 2012 and 2015) and 12 other Best Paper Award nominations, Communications of the ACM Research Highlights (2014), <a href="http://www.sigda.org/onfa">ACM/SIGDA Outstanding New Faculty Award</a> (2005), NSF CAREER Award (2007), SRC Inventor Recognition Award three times, IBM Faculty Award four times, UCLA Engineering Distinguished Young Alumnus Award (2009), UT Austin RAISE Faculty Excellence Award (2014), and many international CAD contest awards, among others. He is a Fellow of IEEE and SPIE. </p> <h2><span style='mso-fareast-font-family:"Times New Roman";mso-bidi-font-family: "Times New Roman"'><a href="http://users.ece.utexas.edu/~dpan/cv/dpan_CV.pdf">Curriculum Vitae </a></span><span style='font-family:[SO;mso-bidi-font-family:[SO; mso-fareast-language:ZH-CN'><o:p></o:p></span></h2> <h2><span style='mso-fareast-font-family:"Times New Roman";mso-bidi-font-family: "Times New Roman"'><a href="http://users.ece.utexas.edu/~dpan/cv/bio_chinese.pdf"><span style='font-family:[SO;mso-bidi-font-family:"0000҉0 StdN W8"'>-Ne</span><span style='font-family:[SO;mso-bidi-font-family:e0}fԚ'>{</span><span style='font-family:[SO;mso-bidi-font-family:"7Q[ Pro"'>S</span><span style='font-family:[SO'> </span></a></span><u><span style='font-family:[SO; mso-bidi-font-family:"Times New Roman";color:blue;mso-fareast-language:ZH-CN'><o:p></o:p></span></u></h2> <div class=MsoNormal align=center style='text-align:center'><span style='mso-bidi-font-family:"Times New Roman"'> <hr size=3 width="100%" align=center> </span></div> </div> </body> </html>