Conference Papers
  8 page PDF File (for Acrobat) Karthik Ganesan, Lizy K. John, James Sexton, and Valentina Salapura.
A Performance Counter Based Workload Characterization on BlueGene/P.
In 37th International Conference on Parallel Processing.
Portland, Oregon, September 2008.
 
  8 page PDF File (for Acrobat) Valentina Salapura, Karthik Ganesan, Alan Gara , Michael Gschwind, James C. Sexton, and Robert E. Walkup.
Next-Generation Performance Counters: Monitoring Over Thousand Concurrent Events.
In 2008 International Symposium on Performance Analysis of Systems and Software.
Austin, Texas, April 2008.
 
  8 page PDF File (for Acrobat) Venkateswaran Nagrajan, Karthik Ganesan et al..
On the Concept of Simultaneous Execution of Multiple Applications on Hierarchically Based Cluster and the Silicon Operating System.
In Parallel and Distributed Processing, 2008, IPDPS 2008.
Miami, Florida, USA.
 
  Jungho Jo, Karthik Ganesan and Lizy K John.
Miniaturized Synthetic Benchmarks for SPEC CPU2006 and Implant Bench Suites.
In Technology and Talent for the 21st Century (TECHCON), September 2009, .
Austin, Texas, USA.
 
  8 page PDF File (for Acrobat) Venkateswaran Nagarajan, Karthik Ganesan et. al.,.
High Performance Low Power Single Chip Reconfigurable Supercomputer for High-end Aerospace Applications.
In 2005 MAPLD International Conference.
Ronald Reagan Building and International Trade Center Washington, D.C., September 7-9, 2005.
 
 Journal Papers
  12 page PDF File (for Acrobat) Venkateswaran Nagarajan, Karthik Ganesan et. al.
Future generation supercomputers II: a paradigm for cluster architecture.
ACM SIGARCH Computer Architecture News Volume 35 , Issue 5 December 2007, Pages 61-70)
 
 Workshop Papers
  8 page PDF File (for Acrobat) Karthik Ganesan, Deepak Panwar, and Lizy John.
Generation, Validation and Analysis of SPEC CPU2006 Simulation Points Based on Branch, Memory, and TLB Characteristics.
In 2009 SPEC Benchmark Workshop.
Austin, Texas, January 2009.
 
  Venkateswaran Nagarajan, Karthik Ganesan et. al.
Simulation Model for predicting the Multi-Million Neuron Interconnectivity involving Dendrites-Axon-Soma-Synapse of the Brain Regions whose BOLD-fMRI is known and Evolution of a neu-rophysiologically Inspired Supercomputing Architecture for Modeling the Respective Brain Re-gions.
In International Workshop on Data driven Model-ing & Computation in Neuroscience, University of Heidelberg in conjunction with Max Planck Institute for Medical Research.
Heidelberg, Germany, May 18-21, 2005.
 
  8 page PDF File (for Acrobat) Venkateswaran Nagarajan, Karthik Ganesan et. al.
Memory Efficient Application Execution In MIP SCOC.
In WARFT Workshop on Brain modeling and Supercomputing.
Chennai, India, March 27-30, 2006.
 
  Venkateswaran Nagarajan, Karthik Ganesan et. al.
Parallel Mapping of Simultaneous Multiple Applications (SMAPP) on a Multihost Hierarchical MIP SCOC Cluster.
In WARFT Workshop on Brain modeling and Supercomputing.
Chennai, India, March 27-30, 2006.
 
 Masters Report
  80 page PDF File (for Acrobat) Karthik Ganesan.
Generation, Validation and Analysis of SPEC CPU2006 Simulation Points Based on Branch, Memory and TLB Characteristics.
Masters Report submitted to the University of Texas at Austin.
 
 Undergraduate Thesis
  110 page PDF File (for Acrobat) Karthik Ganesan.
Hierarchical Multihost Based Operating System For Simultaneous Multiple Application Execution on MIP SCOC Cluster.
Thesis submitted to WAran Research FoundaTion (WARFT).
 
 Undergraduate Project
  110 page PDF File (for Acrobat) Karthik Ganesan and Vishwanath Venkatesan.
Emulating IBM BlueGene on a Linux MPI Cluster.
Project Submitted to Anna University.