VLSI Course

Fall 2008
EE 360R Unique: 16905	Computer Aided Design of ICs
EE 382M-7 Unique: 17210	VLSI-1
T-TH 9:30-11:00
Room: ACA 1.104

Course Goals:

We will be learning the methodologies of implementing a digital system as a CMOS integrated circuit. The course will begin with a review of the basics of CMOS transistor operation and the manufacturing process for CMOS VLSI chips. We will then study in detail the problem of implementing logic gates in CMOS. Specifically, we will cover layout, design rules, and circuit families. Afterwards, we will examine techniques for analyzing and optimizing timing and power at the circuit level. We will study sequential elements—latches and flops—and clocking. This will be followed by an overview of datapath design: detection logic, shifters, comparators, adders, and multipliers. We will also study memories, specifically the workhorse 6-T SRAM cell as well as peripheral decode logic. The course will conclude with a survey level treatment of various topics, including advanced circuit design techniques, clock tree design, functional verification, test, design-for-test, electrical effects, packaging, and future trends.

Course prerequisites:

A working knowledge of digital logic design (EE316 or its equivalent), circuit design (EE438) is required. Some understanding of Computer Architecture (EE360N, or its equivalent) would be helpful.

Text book:

N. Weste and D. Harris, CMOS VLSI Design: A Circuits and Systems Perspective (3rd Edition), 2005. Addison-Wesley.

Instructor

Mark McDermott
Office: ENS 425

Phone: 471-3253
Office hours: T-Th 11:00-12:00

Project Info (Grad students only)

All Graduate students will be required to do project as part of your final grade.

Info on the project is located at: project_fall_2008.pdf

Teaching Assistants

Refer to TA web page for labs/homework and TA/grader office hours

Course outline and schedule:

DATE

DAY

LECT. #

TOPIC

READING
INSTRUCTOR
HOMEWORK

LAB/PROJECT

Aug 28

Thu

1

Introduction, CMOS Transistors

1.1-1.3

McDermott

Lab. 1 Assigned

Sep 2

Tue

2

CMOS Fabrication and Layout

3.1-3.5

McDermott

Sep 4

Thu

3

CMOS Logic

1.4-1.5

McDermott

Homework 1

Sep 9

Tue

4

MOS Transistor Theory

2.1-2.3.1

McDermott

Sep 11

Thu

5

DC and Transient Gate Characteristics

2.3.2-2.6, 4.2

McDermott

Homework 2

Sep 16

Tue

6

Interconnects in CMOS Technology

4.5-4.6

McDermott

Sep 18

Thu

7

Logical Effort

4.3

McDermott

Homework 3

Lab. 1 Due/ Lab. 2 Assigned

(for grad students)

Sep 23

Tue

8
Combinational Circuits
6.1-6.2.1

McDermott

Sep 25

Thu

9

Sequential Elements

7.1-7.5

McDermott

Homework 4

Lab. 1 Due/ Lab. 2 Assigned

(for undergrad students)

Sep 30

Tue

9

Sequential Elements & Clocking

7.1-7.5

McDermott

Oct 2

Thu

10

Design of Adders

10.1-10.2

McDermott

Oct 7

Tue

11

Datapath Design

10.3-10.10

McDermott

Oct 9

Thu

Exam I

Sample Exam

Oct 14

Tue

12

Floorplanning

Notes

McDermott

Project Selection Due

(for grad students)

Oct 16

Thu

14
Hardware Description Languages, Synthesis Notes
McDermott

Homework 5

Lab. 2 Due/ Lab. 3 Assigned

(for grad students)

Oct 21

Tue

15

Dynamic CMOS Logic

6.2.2-6.2.5, 6.4-6.6

McDermott

Oct 23

Thu

16

Memories

11.1-11.3

McDermott

Homework 6

Oct 28

Tue

17

FSMs, CAMs, ROMs, PLAs

11.4-11.7

McDermott

Oct 30

Thu

18

Deep Submicron Issues

2.4, 4.7

McDermott

Homework 7

Lab. 2 Due/ Lab. 3 Assigned

(for undergrad students)

Nov 4

Tue

21

Introduction to Test

9.1, 9.3

McDermott

Nov 6

Thu

19

Advanced Verification Techniques

Notes

Foster

Intermediate Project Report

Due (for grad students)

Nov 11

Tue

20

Introduction to Verification

9, Notes

Warner

Nov 13

Thu

Exam II
Sample Exam

Nov 18

Tue

22

Design for Low Power

6.5

McDermott

Nov 20

Thu

23

Packaging and I/O

12.2-12.4

McDermott

Homework 8

Lab. 3A Due

(for undergrad students)

Nov 25

Tue

24

Scaling & Economics

4.9, 8.5

McDermott

Lab. 3 Due:

(for graduate students)

Nov 27

Thu

THANKSGIVING

Dec 2

Tue

25

Circuit Pitfalls, Tips and Tricks

Notes

McDermott

Dec 4

Thu.

26

Course Review

Notes

McDermott

Lab. 3B Due

(for undergrad students)

Dec 5

Fri

Last Day of Class

Final Project Due Dec 5th

(for grad students)

Grading (360R):		Grading (382M-7):
Homework	10%	Homework	10%
Labs	45%	Labs	36%
Exam #1	15%	Exam #1	15%
Exam #2	15%	Exam #2	15%
Final Exam	15%	Project	24%
Penalty for late submission: 5% per working day (maximum 25%, no submissions after 5 working days)		Penalty for late submission: 10% per working day (maximum 50%, no submissions after 5 working days)

DATE	DAY	LECT. #	TOPIC	READING	INSTRUCTOR	HOMEWORK	LAB/PROJECT
Aug 28	Thu	1	Introduction, CMOS Transistors	1.1-1.3	McDermott		Lab. 1 Assigned
Sep 2	Tue	2	CMOS Fabrication and Layout	3.1-3.5	McDermott
Sep 4	Thu	3	CMOS Logic	1.4-1.5	McDermott	Homework 1
Sep 9	Tue	4	MOS Transistor Theory	2.1-2.3.1	McDermott
Sep 11	Thu	5	DC and Transient Gate Characteristics	2.3.2-2.6, 4.2	McDermott	Homework 2
Sep 16	Tue	6	Interconnects in CMOS Technology	4.5-4.6	McDermott
Sep 18	Thu	7	Logical Effort	4.3	McDermott	Homework 3	Lab. 1 Due/ Lab. 2 Assigned (for grad students)
Sep 23	Tue	8	Combinational Circuits	6.1-6.2.1	McDermott
Sep 25	Thu	9	Sequential Elements	7.1-7.5	McDermott	Homework 4	Lab. 1 Due/ Lab. 2 Assigned (for undergrad students)
Sep 30	Tue	9	Sequential Elements & Clocking	7.1-7.5	McDermott
Oct 2	Thu	10	Design of Adders	10.1-10.2	McDermott
Oct 7	Tue	11	Datapath Design	10.3-10.10	McDermott
Oct 9	Thu		Exam I	Sample Exam
Oct 14	Tue	12	Floorplanning	Notes	McDermott		Project Selection Due (for grad students)
Oct 16	Thu	14	Hardware Description Languages, Synthesis	Notes	McDermott	Homework 5	Lab. 2 Due/ Lab. 3 Assigned (for grad students)
Oct 21	Tue	15	Dynamic CMOS Logic	6.2.2-6.2.5, 6.4-6.6	McDermott
Oct 23	Thu	16	Memories	11.1-11.3	McDermott	Homework 6
Oct 28	Tue	17	FSMs, CAMs, ROMs, PLAs	11.4-11.7	McDermott
Oct 30	Thu	18	Deep Submicron Issues	2.4, 4.7	McDermott	Homework 7	Lab. 2 Due/ Lab. 3 Assigned (for undergrad students)
Nov 4	Tue	21	Introduction to Test	9.1, 9.3	McDermott
Nov 6	Thu	19	Advanced Verification Techniques	Notes	Foster		Intermediate Project Report Due (for grad students)
Nov 11	Tue	20	Introduction to Verification	9, Notes	Warner
Nov 13	Thu		Exam II	Sample Exam
Nov 18	Tue	22	Design for Low Power	6.5	McDermott
Nov 20	Thu	23	Packaging and I/O	12.2-12.4	McDermott	Homework 8	Lab. 3A Due (for undergrad students)
Nov 25	Tue	24	Scaling & Economics	4.9, 8.5	McDermott		Lab. 3 Due: (for graduate students)
Nov 27	Thu		THANKSGIVING
Dec 2	Tue	25	Circuit Pitfalls, Tips and Tricks	Notes	McDermott
Dec 4	Thu.	26	Course Review	Notes	McDermott		Lab. 3B Due (for undergrad students)
Dec 5	Fri		Last Day of Class				Final Project Due Dec 5th (for grad students)