Fall 2008

EE 382N-4   Unique: 17228

Advanced Embedded Systems Architecture

NOTE: ECD Only - no auditors

 


 Course Goals:

This course focuses on the HW/SW architectures of “System-on-a-Chip (SoC) implementations. These SoC’s are composed of hardware and software components which must be seamlessly integrated together to produce working “Systems-on-Chip” (SoC) or “Systems-in-Package” (SiP). These systems are becoming increasingly complex utilizing micro-architectural features from high performance computing platforms and operating systems such as Linux and Windows. The topics covered will remain focused on HW/SW design of embedded systems with an added focus of design optimization across the multiple design metrics such as power, cost, reusability, time to volume, performance, security, and robustness. This course will provide a working knowledge in both HW and SW architectures such that the student will be able to determine where to make multi-metric optimizations across these two domains.

 


 Course prerequisites

 


Instructors:

Mark McDermott
Office: ENS 425

Phone: 471-3253
Office hours: Sun 14:00 - 16:00

Jacob Abraham

Steven Smith

Matt Genovese

 


TAs

Ramtilak Vemu

Office: ACES 2.402

Hours: tbd

email: tbd

 


Course Textbook:

Wayne Wolf    Computers as Components: Principles of Embedded Computing System Design, 2nd Edition, Morgan Kaufman Publishers, 2008

 


Reference Books:

John Shen, Mikko Lipasti      Modern Processor Design

Sreekrishnan Venkateswaran   Essential Linux Device Drivers (Prentice Hall Open Source Software Development Series)

Karim Yaghmour    Building Embedded Linux Systems

Wayne Wolf, HighHigh-Performance Embedded Computing: Architectures, Applications, and Methodologies

 


Course outline and schedule:

 

Dates

Time Lecture Topic Instructor Lecture Notes HW Assignments LAB Assignments
Aug 22

8:00 - 8:30

Intro to Embedded Systems Architecture

McDermott

Lecture 1

HW #1

 

Due Sep 21

LAB #1

 

Due Oct 5

8:30 – 10:15

Processor Micro-Architecture Part 1

 McDermott

Lecture 2

10:30 - 12:00

Processor Micro-Architecture Part 2

 McDermott

Lecture 3

Aug 23

8:00 – 9:30

Instruction Set Architecture Design

 McDermott

Lecture 4

9:30 – 10:45

ARM Instruction Set Architecture

 McDermott

Lecture 5

11:00 - 12:00

Monitors, Bootloaders

 McDermott

Lecture 6

Sep 19

8:00 – 9:15

Embedded Linux Part 1

McDermott

Lecture 7

 HW #2

 

Due Oct 19

LAB #2

 

Due

9:15 – 10:30

Embedded Linux Part 2

McDermott

Lecture 8

10:45 - 12:00

Device Driver Development

Genovese

Lecture 9

Sep 20

8:00 – 9:15

Interrupts & Interrupt Handlers

McDermott

Lecture 10

9:15 – 10:30

Digital Signal Processor Architectures

McDermott

Lecture 11

10:45 - 12:00

Blackfin Instruction Set Architecture

 McDermott

Lecture 12

 

Oct 17

8:00 – 9:15

Reconfigurable Micro-Architectures &

Hardware Acceleration

McDermott

Lecture 13

 

HW #3

 

Due Nov 16 

 

LAB #3

 

Due

9:15 – 10:30

FPGA Architectures

McDermott

Lecture 14

10:45 - 12:00

Exam #1 

McDermott

 

Oct 18

8:00 – 9:15

SW Library Development

Smith

Lecture 15

9:15 – 10:30

Real Time Operating Systems

Smith

Lecture 16

10:45 - 12:00

Embedded OS Middleware

 Smith

Lecture 17

Nov 14

8:00 – 9:15

Flash Memory & Flash File Systems

McDermott

Lecture 18

 

HW #4

 

Due Dec 12

 

 

 

9:15 – 10:30

 Embedded Software Optimization &

Power Aware Programming

Smith

Lecture 19

10:45 - 12:00

I/O Subsystems

 McDermott

Lecture 20

Nov 15

8:00 – 9:15

Networks-on-Chips 

 McDermott

Lecture 21

9:15 – 10:30

 Intelligent Sensors 

 McDermott

Lecture 22

10:45 - 12:00

SOC Platform Architectures

McDermott 

Lecture 23

Dec 11

8:00 – 9:15

Debugging Embedded Systems

McDermott 

Lecture 24

 

 

9:15 – 10:30

Testing Embedded Systems

Abraham

Lecture 25

 

 

10:45 - 12:00

Exam #2

McDermott 

 

 

 

Dec 12

8:00 - 12:00

Project Presentations

       

 

 Grading:

Homework 10%
Labs 30%
Exam #1 15%
Exam #2 15%
Project 30%

Late Submission Penalties:

Penalty for late submission of homework and class project:
25% per working day. (Maximum: 100%).

 


 Computer Lab:

 The computer lab is located in ENS 113A. Access will be provided by the TA


Web Resources

Linux Devices: http://www.linuxdevices.com

Embedded Linux Journal: http://embedded.linuxjournal.com

Embedded.com: http://www.embedded.com/

Embedded Systems Programming magazine

Circuit Cellar: http://www.circuitcellar.com/

Electronic Design Magazine: http://electronicdesign.com/

Berkeley Design technology, Inc.: http://www.bdti.com

DSP Guru: http://www.dspguru.com/

EEMBC:  http://www.eembc.org/home.php

EE Times Magazine: http://www.eet.com/

Sensors Magazine: http://www.sensorsmag.com 

Embedded Systems Tutorial: http://www.learn-c.com/

TechOnLine: http://www.techonline.com/

Collections of embedded systems resources

http://www.ece.utexas.edu/~bevans/courses/ee382c/resources/

http://www.ece.utexas.edu/~bevans/courses/realtime/resources.html

 


Articles that support lecture material:

M. Schlett, “Trends in embedded-microprocessor design,” IEEE Computer, vol. 31, no. 8, pp. 44-49, Aug. 1998.

J. Fridman and Z Greenfield, “The TigerSHARC DSP architecture,” IEEE Micro, vol. 20, no. 2, pp. 66 -76, 2000

Y. Lin, H. Lee, M. Woh, Y. Harel, S. Mahlke, T. Mudge, C. Chakrabarti, and K. Flautner, “SODA: A Low-power Architecture For Software Radio,” Proceedings of the 33rd International Symposium on Computer Architecture, pp. 89-100, June 2006.

M. J. Schulte, J. Glossner, S. Jinturkar, M. Moudgill, S. Mamidi, and S. Vassiliadis, "A Low-Power Multithreaded Processor for Software Defined Radio," Journal of VLSI Signal Processing Systems, vol. 43, No. 2/3, pp. 143-159, June 2006.

C. Kozyrakis, C. and D. Patterson, “Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks,” Proceedings of the 35th Annual IEEE/ACM International Symposium on Microarchitecture, pp. 283-293, Nov. 2002.

M. Gschwind, H. P. Hofstee, B. Flachs, M. Hopkins, Y. Watanabe, and T. Yamazaki, “Synergistic Processing in Cell's Multicore Architecture, IEEE Micro, vol. 26,  no 2,  pp. 10-24, March-April 2006

B. Khailany, W. J. Dally, U. J. Kapasi, P. Mattson, J. Namkoong, J. D. Owens, B. Towles, A. Chang, and S. Rixner, “Imagine: media processing with streams,” IEEE Micro, vol. 21, no. 2, pp. 35-46, 2001

M. Adiletta, M. Rosenbluth, D. Bernstein, G. Wolrich, and H. Wilkinson, “The next generation of Intel IXP network processors,” Intel Technology Journal, vol. 6, no. 3, August 2002.

P. Faraboschi, G. Brown, J. A. Fisher, G. Desoli, and F. Homewood. "Lx: A Technology Platform for Customizable VLIW Embedded Processing," Proceedings of International Symposium of Computer Architecture, pp. 203-213, June 2000.

R. E. Gonzalez, “Xtensa: a configurable and extensible processor,” IEEE Micro, vol. 20, no. 2, pp. 60-70, 2000.

N. Clark, J. Blome, M. Chu, S. Mahlke, S. Biles, and K. Flautner, “An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors,” Proceedings of the 32nd International Symposium on Computer Architecture, pp. 272-283, June. 2005.

S. Vassiliadis, S. Wong, G. N. Gaydadjiev, K. Bertels, G.K. Kuzmanov, E. Moscu Panainte, “The Molen Polymorphic Processor,” IEEE Transactions on Computers, vol. 53, no. 11, pp. 1363- 1375, November 2004.

L. Chakrapani, J. Gyllenhaal, W. Hwu, S. Mahlke, K. Palem, and R. Rabbah, “Trimaran: An Infrastructure for Research in Instruction-Level Parallelism,” Lecture Notes in Computer Science, Springer-Verlag, vol. 3602, pp. 32-41, August 2005. (trimar

R. Leupers, M. Hohenauer, J. Ceng, H. Scharwaechter, H. Meyr, G. Ascheid, and G. Braun2, “Retargetable compilers and architecture exploration for embedded processors,” IEE Proceedings - Computers and Digital Techniques, vol. 152, no. 2, pp. 209-223, March 2005.  (retargetable-compilers-architectures.pdf)

Y. Xie, W. Wolf, H. Lekatsas, “A Code Decompression Architecture for VLIW Processors,” 34th Annual International Symposium on Microarchitecture,  pp. 66-75,  2001. (decompression.pdf)

V. J. Moone and D. M. Blough, “A hardware-software real-time operating system framework for SoCs, IEEE Design & Test of Computers, vol. 19, no. 6, pp. 44-51, Nov/Dec 2002. (rtos-soc.pdf)

A. Finkelstein and J. Kramer. Software Engineering: A Roadmap. In The Future of Software Engineering, Anthony Finkelstein (Ed.), pp. 5-22, ACM Press 2000.

M. Mikic-Rakic and N. Medvidovic. Architecture-Level Support for Software Component Deployment in Resource Constrained Environments. In Proceedings of the IFIP/ACM Working Conference on Component Deployment (CD 2002), Berlin, Germany, June 20-21, 2002.

M. Mikic-Rakic, S. Malek, and N. Medvidovic. A Style-Aware Architectural Middleware for Resource-Constrained, Distributed Systems. Technical Report USC-CSE-2004-508, June 2004.

N. Medvidovic, M. Mikic-Rakic, N Mehta, and S. Malek. Software Architectural Support for Handheld Computing. IEEE Computer – Special Issue on Handheld Computing, September 2003.

C. Mattmann, S. Malek, N. Beckman, M. Mikic-Rakic, N. Medvidovic, and D. Crichton. GLIDE:  A Grid-based Lightweight Infrastructure for Data-intensive Environments. Technical Report USC-CSE-2004-509, August 2004.

E. A. Lee. Embedded Software. In Advances in Computers, Ed Zelkowitz (Ed), Academic Press, 2002.

J. A. Stankovic et al. Strategic Directions in Real-Time and Embedded Systems. ACM Computing Surveys, vol. 28, no. 4, pp. 751-763, December 1996.

B. Nuseibeh and S. Easterbrook. Requirements Engineering: A Roadmap. In The Future of Software Engineering, Anthony Finkelstein (Ed.), pp. 37-46, ACM Press 2000.

R. R. Lutz. Analyzing Software Requirements Errors in Safety-Critical, Embedded Systems. In Proceedings of the IEEE International Symposium on Requirements Engineering, 1993.

D. Garlan. Software Architecture: A Roadmap. In The Future of Software Engineering, Anthony Finkelstein (Ed.), pp. 93-101, ACM Press 2000.

 


 © Copyright 2008 Mark McDermott