Spring 2012

EE 382N-4   Unique: 16880

Advanced Embedded Systems Architecture

NOTE: ICS Only - no auditors


 Course Goals:

This course focuses on the HW/SW architectures of “System-on-a-Chip (SoC) implementations. These SoC’s are composed of hardware and software components which must be seamlessly integrated together to produce working “Systems-on-Chip” (SoC) or “Systems-in-Package” (SiP). These systems are becoming increasingly complex utilizing micro-architectural features from high performance computing platforms and operating systems such as Linux and Windows. The topics covered will remain focused on HW/SW design of embedded systems with an added focus of design optimization across the multiple design metrics such as power, cost, reusability, time to volume, performance, security, and robustness. This course will provide a working knowledge in both HW and SW architectures such that the student will be able to determine where to make multi-metric optimizations across these two domains.


 Course prerequisites

Class Projects

 The class projects can encompass a wide range of embedded applications including: RTOS porting, Linux Kernel development, feedback control systems, JTAG debuggers, etc. Here are the presentations from previous semester projects:







Mark McDermott
Office: ENS 425

Phone: 471-3253
Office hours: Sun 14:00 - 15:00  ACES 2.404B





Course Textbook:

Wayne Wolf    Computers as Components: Principles of Embedded Computing System Design, 2nd Edition, Morgan Kaufman Publishers, 2008


Reference Books:

John Shen, Mikko Lipasti      Modern Processor Design

Sreekrishnan Venkateswaran   Essential Linux Device Drivers (Prentice Hall Open Source Software Development Series)

Karim Yaghmour    Building Embedded Linux Systems

Wayne Wolf, HighHigh-Performance Embedded Computing: Architectures, Applications, and Methodologies


Course outline and schedule:



Time Lecture Topic Lecture Notes LAB Assignments
Jan 13

8:00 - 9:00

Intro to Embedded Systems Architecture

Class Project Overview

Lecture 1

LAB #1


Due Feb 20

9:00 – 10:15

Instruction Set Architecture Design

Lecture 2

10:30 - 12:00

Processor Micro-Architecture Part 1

Lecture 3

Jan 14

8:00 – 9:30

Processor Micro-Architecture Part 2

Lecture 4

9:30 – 10:30

Device Driver Overview

Lecture 5

10:45 - 12:00

Linux Device Driver Development

Lecture 6

Feb 10

8:00 – 9:15

ARM Instruction Set Architecture

Lecture 7

LAB #2


Due Mar 19

9:15 – 10:30

ARM SW Programming

Lecture 8

10:45 - 12:00

Digital Signal Processor Architectures

Lecture 9

Feb 11

8:00 – 9:15

Cognitive Sensor Systems

Lecture 10

9:15 – 10:30

Monitors, Bootloaders

Lecture 11

10:45 - 12:00

Interrupts & Interrupt Handlers

Lecture 12

 Mar 2

8:00 – 9:15

Debugging Embedded Systems

Lecture 13

LAB #3


Due Apr 23

9:15 – 10:30

Hardware Accelerators

Lecture 14

10:45 - 12:00

Embedded Software Optimization &

Power Aware Programming

Lecture 15

Mar 3

8:00 – 9:15

Embedded Linux

Lecture 16

9:15 – 10:30


10:45 - 12:00

Exam #1 


Apr 13

8:00 – 9:15

Real Time Operating Systems Lecture 17  

9:15 – 10:30

SW Library Development

Lecture 18

10:45 - 12:00

Embedded OS Middleware

Lecture 19

Apr 14

8:00 – 9:15

I/O Subsystems

Lecture 20

9:15 – 10:30

Flash Memory & Flash File Systems

Lecture 21

10:45 - 12:00

Blackfin Instruction Set Architecture

Lecture 22

May 11

8:00 – 9:15

 FPGA Architectures

Lecture 23  

9:15 – 10:30


Lecture 24


10:45 - 12:00

Exam #2



May 12

8:00 - 12:00




Homework 10%
Labs 30%
Exam #1 15%
Exam #2 15%
Project 30%

Late Submission Penalties:

Penalty for late submission of homework and class project:
25% per working day. (Maximum: 100%).


 Computer Lab:

 The computer lab is located in ENS 114. Access will be provided by the TA

Web Resources

Linux Devices: http://www.linuxdevices.com

Linux Journal: http://www.linuxjournal.com/

Embedded.com: http://www.eetimes.com/design/embedded

Circuit Cellar: http://www.circuitcellar.com/

Electronic Design Magazine: http://electronicdesign.com/

Berkeley Design technology, Inc.: http://www.bdti.com

DSP Guru: http://www.dspguru.com/

EEMBC:  http://www.eembc.org/home.php

EE Times Magazine: http://www.eet.com/

Sensors Magazine: http://www.sensorsmag.com 

Embedded Systems Tutorial: http://www.learn-c.com/

TechOnLine: http://www.techonline.com/

Collections of embedded systems resources




Articles that support lecture material:

M. Schlett, “Trends in embedded-microprocessor design,” IEEE Computer, vol. 31, no. 8, pp. 44-49, Aug. 1998.

J. Fridman and Z Greenfield, “The TigerSHARC DSP architecture,” IEEE Micro, vol. 20, no. 2, pp. 66 -76, 2000

Y. Lin, H. Lee, M. Woh, Y. Harel, S. Mahlke, T. Mudge, C. Chakrabarti, and K. Flautner, “SODA: A Low-power Architecture For Software Radio,” Proceedings of the 33rd International Symposium on Computer Architecture, pp. 89-100, June 2006.

M. J. Schulte, J. Glossner, S. Jinturkar, M. Moudgill, S. Mamidi, and S. Vassiliadis, "A Low-Power Multithreaded Processor for Software Defined Radio," Journal of VLSI Signal Processing Systems, vol. 43, No. 2/3, pp. 143-159, June 2006.

C. Kozyrakis, C. and D. Patterson, “Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks,” Proceedings of the 35th Annual IEEE/ACM International Symposium on Microarchitecture, pp. 283-293, Nov. 2002.

M. Gschwind, H. P. Hofstee, B. Flachs, M. Hopkins, Y. Watanabe, and T. Yamazaki, “Synergistic Processing in Cell's Multicore Architecture, IEEE Micro, vol. 26,  no 2,  pp. 10-24, March-April 2006

B. Khailany, W. J. Dally, U. J. Kapasi, P. Mattson, J. Namkoong, J. D. Owens, B. Towles, A. Chang, and S. Rixner, “Imagine: media processing with streams,” IEEE Micro, vol. 21, no. 2, pp. 35-46, 2001

M. Adiletta, M. Rosenbluth, D. Bernstein, G. Wolrich, and H. Wilkinson, “The next generation of Intel IXP network processors,” Intel Technology Journal, vol. 6, no. 3, August 2002.

P. Faraboschi, G. Brown, J. A. Fisher, G. Desoli, and F. Homewood. "Lx: A Technology Platform for Customizable VLIW Embedded Processing," Proceedings of International Symposium of Computer Architecture, pp. 203-213, June 2000.

R. E. Gonzalez, “Xtensa: a configurable and extensible processor,” IEEE Micro, vol. 20, no. 2, pp. 60-70, 2000.

N. Clark, J. Blome, M. Chu, S. Mahlke, S. Biles, and K. Flautner, “An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors,” Proceedings of the 32nd International Symposium on Computer Architecture, pp. 272-283, June. 2005.

S. Vassiliadis, S. Wong, G. N. Gaydadjiev, K. Bertels, G.K. Kuzmanov, E. Moscu Panainte, “The Molen Polymorphic Processor,” IEEE Transactions on Computers, vol. 53, no. 11, pp. 1363- 1375, November 2004.

L. Chakrapani, J. Gyllenhaal, W. Hwu, S. Mahlke, K. Palem, and R. Rabbah, “Trimaran: An Infrastructure for Research in Instruction-Level Parallelism,” Lecture Notes in Computer Science, Springer-Verlag, vol. 3602, pp. 32-41, August 2005. (trimar

R. Leupers, M. Hohenauer, J. Ceng, H. Scharwaechter, H. Meyr, G. Ascheid, and G. Braun2, “Retargetable compilers and architecture exploration for embedded processors,” IEE Proceedings - Computers and Digital Techniques, vol. 152, no. 2, pp. 209-223, March 2005.  (retargetable-compilers-architectures.pdf)

Y. Xie, W. Wolf, H. Lekatsas, “A Code Decompression Architecture for VLIW Processors,” 34th Annual International Symposium on Microarchitecture,  pp. 66-75,  2001. (decompression.pdf)

V. J. Moone and D. M. Blough, “A hardware-software real-time operating system framework for SoCs, IEEE Design & Test of Computers, vol. 19, no. 6, pp. 44-51, Nov/Dec 2002. (rtos-soc.pdf)

A. Finkelstein and J. Kramer. Software Engineering: A Roadmap. In The Future of Software Engineering, Anthony Finkelstein (Ed.), pp. 5-22, ACM Press 2000.

M. Mikic-Rakic and N. Medvidovic. Architecture-Level Support for Software Component Deployment in Resource Constrained Environments. In Proceedings of the IFIP/ACM Working Conference on Component Deployment (CD 2002), Berlin, Germany, June 20-21, 2002.

M. Mikic-Rakic, S. Malek, and N. Medvidovic. A Style-Aware Architectural Middleware for Resource-Constrained, Distributed Systems. Technical Report USC-CSE-2004-508, June 2004.

N. Medvidovic, M. Mikic-Rakic, N Mehta, and S. Malek. Software Architectural Support for Handheld Computing. IEEE Computer – Special Issue on Handheld Computing, September 2003.

C. Mattmann, S. Malek, N. Beckman, M. Mikic-Rakic, N. Medvidovic, and D. Crichton. GLIDE:  A Grid-based Lightweight Infrastructure for Data-intensive Environments. Technical Report USC-CSE-2004-509, August 2004.

E. A. Lee. Embedded Software. In Advances in Computers, Ed Zelkowitz (Ed), Academic Press, 2002.

J. A. Stankovic et al. Strategic Directions in Real-Time and Embedded Systems. ACM Computing Surveys, vol. 28, no. 4, pp. 751-763, December 1996.

B. Nuseibeh and S. Easterbrook. Requirements Engineering: A Roadmap. In The Future of Software Engineering, Anthony Finkelstein (Ed.), pp. 37-46, ACM Press 2000.

R. R. Lutz. Analyzing Software Requirements Errors in Safety-Critical, Embedded Systems. In Proceedings of the IEEE International Symposium on Requirements Engineering, 1993.

D. Garlan. Software Architecture: A Roadmap. In The Future of Software Engineering, Anthony Finkelstein (Ed.), pp. 93-101, ACM Press 2000.


  Copyright 2008 - 2012 Mark McDermott