EE 382V - SOC Design 


 Course goals:


This course is designed to:

  • Provide an understanding of the concepts, issues, and process of system-level design of embedded systems, i.e., hardware-software co-design & co-verification.

  • Expose the student to the modeling and specification of an embedded system at a high level of abstraction.

  • Use co-simulation to validate system functionality.

  • Analyze the functional and nonfunctional performance of the system early in the design process to support design decisions.

  • Analyze hardware/software tradeoffs, algorithms, and architectures to optimize the system based on requirements and implementation constraints.

  • Describe architectures for control-dominated and data-dominated systems and real-time systems.

  • Understand hardware, software, and interface synthesis.

  • Understand issues in interface design.

  • Describe examples of applications and systems developed using a co-design approach.

  • Appreciate issues in system-on-a-chip design associated with co-design, such as intellectual property, reuse, and verification.


Course prerequisites: 

Student should have a working knowledge of C and C++ including software development and debugging. It is helpful to have some basic knowledge of communication systems, The class project involves taking public domain C++ code for a DRM  (Digital Radio Mondiale) PC based system and mapping it to an FPGA based platform.


Suggested Reference Books:


SystemC: From the Ground Up (Kluwer )

Embedded Systems Handbook, Edited by Richard Zurawski, Taylor & Francis

Embedded Systems Architecture: A Comprehensive Guide for Engineers and Programmers

Thinking in C++ 2nd Edition by Bruce Eckel




Mark McDermott
Office: UTA 7.220, Phone: (512) 471-3253
Office hours: Thu 5:00 - 6:00 pm, or by appointment



Teaching Assistant:


TBD -- Office hours: TBD

Lab Assignments:






Class Project


The details for project are located here: Class Project


 Course outline and schedule:





Lecture Topic


Lecture Notes

4 per page

Jan 18

8:00 – 9:30

Tutorial: C++

David Black, ESLX


9:45 - 12:00

System-C Tutorial

David Black, ESLX

Lecture 1

Jan 19

8:00 -8:15

Class Overview


Lecture 0

8:15 -11:15

Project MRD


Lecture 2a

11:15 - 12:00

Project Overview


Lecture 2b

Feb 15

8:00 – 9:15

Mapping High Level Language applications to System-C


Lecture 4

9:15 – 10:30

Performance Analysis of Embedded Systems


Lecture 5

10:45 - 12:00

System Level Design Methodology


Lecture 6

SW Estimation

HW Estimation

Feb 16

8:00 – 9:15

Transaction Modeling and

Electronic system languages


Lecture 7

9:15 – 10:30

Hardware accelerators, media instructions coprocessors


Lecture 8

White Paper

10:45 - 12:00

Theory and application of algorithmic mapping


Lecture 9

Mar 7

8:00 – 9:00

HW/SW Partitioning 


Lecture 10

9:00 – 10:00

Models of Computation


 Lecture 11

10:00 - 12:00

Dataflow Networks


Lecture 12

Mar 8

8:00 – 9:15

Communication of FSMs


Lecture 13

9:15 – 10:30

Discrete Events


Lecture 14

10:45 - 12:00

Synthesis (C --> FPGA)


Lecture 15

Apr 11

8:00 – 9:00

System Integration


Lecture 16

9:00 - 12:00



Previous Exam Questions

Apr 12

8:00 – 9:15

Verification (HW/SW Co-verification)


Lecture 17

9:15 – 10:30

Testing SOCs


Lecture 18

10:45 - 12:00

Special Topic: TBD


Lecture 19

May 9

8:00 – 12:00

Project Design Reviews

May 10

8:00 - 12:00

Project Design Reviews






Link to Various SOC Articles


Link to Prof. Adnan’s VLSI Communications Class Notes


Link to System-C tutorials


Link to DRM Information


Link to AADL Information



Relevant Web Pages: Gigascale Website Giotto Website AS-V’s Website Berkeley Wireless Research Center Website Cadence Design tools based on Polis Estrerel programming language Website UC Irvine Center for Embedded Computer Systems UCI Technical reports Embedded system design text book slides CMU Center for Silicon System Implementation




General Reference


G. De Micheli, editor

Special Issue on Hardware/Software Co-design

Proceedings of IEEE, Vol 85, No. 3, March 1997.


D. D. Gajski, F. Vahid, S. Narayan, J. Gong

Specification and Design of Embedded Systems,

Prentice Hall, Englewood Cliffs, NJ, 1994.

J. Staunstrup and W. Wolf, editors

Hardware/Software Co-Design: Principles and Practice

Kluwer Academic Publishers, 1997.


G. DeMicheli, R. Ernst, and W. Wolf, editors,

Readings in Hardware/Software Co-Design,

Academic Press, 2002.


Friedrich Mayer-Lindenberg

Dedicated Digital Processors: Methods in Hardware/Software Co-design
John Wiley and Sons, February 2004


Design of Embedded Systems


S. Edwards, L. Lavagno, E. Lee, A. Sangiovanni-Vincentelli

Design of Embedded Systems: Formal Methods, Validation and Synthesis

Proceedings of the IEEE, vol. 85 (n.3) - March 1997, p366-290

R. B. Ortega L. Lavagno, G. Borriello

Models and Methods for HW/SW Intellectual Property Interfacing

1998 NATO ASI Proceedings on System Synthesis, Il Ciocco (Italy) 1998

J. Young, J. MacDonald, M. Shilman, A. Tabbara, P. Hilfinger and R. Newton

Design and Specification of Embedded Systems in Java Using Successive, Formal


Proceedings of Design Automation Conference 1998, p70-75


Models of Computation



L. Lavagno, A. Sangiovanni-Vincentelli and E. Sentovich

Models of Computation for Embedded System Design

1998 NATO ASI Proceedings on System Synthesis, Il Ciocco (Italy) 1998


Finite State Machines

D. Harel

Statecharts: A Visual Formalism for Complex Systems

Sci. Comput. Programs, 8:231-274, 1987.

D. Harel, H, Lachover, A. Namad, A. Pnueli, M. Politi, R. Sherman, A. Shtull-Trauring, M.Trakhtenbrot

STATEMATE: A Working Enviroment for the Development of Complex Reactive Systems

IEEE Transaction on Software Engineering, vol. 16, No. 4, 1990


D. Harel, A. Namad

The STATEMATE Semantics of Statecharts

ACM Transactions on Software Engineering and Methodology, Vol. 5, No. 4, 1996

A. Girault, B. Lee, E.A. Lee

Hierarchical finite state machines with multiple concurrency models

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 18, No. 6, 1999, pp.742-760



L. Thiele, K. Strehl, D. Ziegenbein, R. Ernst, and J. Teich

FunState: An Internal Design Representation for Codesign

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD-99),

San Jose, California, pages 558-565, November 7-11, 1999



F. Vahid, S. Narayan, D. D. GAjski

SpecCharts: a VHDL front-end for embedded systems

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 14, (no.6), June 1995, p. 694-706



E. A. Lee and D. G. Messerschmitt

Synchronous Data Flow

Proc. of the IEEE, September, 1987.

E. A. Lee and T. M. Parks

Dataflow Process Networks

Proceedings of the IEEE, vol. 83, no. 5, pp. 773-801, May, 1995.


Synchronous Languages

N. Halbwachs

Synchronous Programming of Reactive Systems

Kluwer Academic Publishers, 1993.

Gerard Berry

The Foundations of Esterel

Proof, Language and Interaction: Essays in Honour of Robin Milner, G. Plotkin, C. Stirling and M. Tofte, editors, MIT Press, 1998.

Gerard Berry

The Esterel v5 Language Primer

Ecole des Mines and INRIA, for latest updates on Esterel:

Page 2 of 8 Relevant Publications


N. Halbwachs, P. Raymond

A Tutorial of Lustre


Petri Nets

Tadao Murata

Petri Nets: Properties, Analysis and Applications

Proceedings of IEEE, vol. 77, No. 4, April 1989, pp541-580.

J. Cortadella, M. Kishinevsky, L. Lavagno, and A. Yakovlev

Synthesizing Petri nets from state-based models

Proceedings of the International Conference on Computer-Aided Design, November 1995

Van Der Aalst, W.M.P.

The application of Petri nets to workflow management.

Journal of Circuits, Systems and Computers, vol.8, (no.1), World Scientific, Feb.

1998. p.21-66.

Jaragh, M.; Saleh, K.

Synthesis of communications protocol converters using the timed Petri net model

Journal of Systems and Software, vol.47, (no.1), Elsevier, 1 May 1999. p.53-69


Tagged-Signal Model

E. Lee, A. Sangiovanni-Vincentelli

A Denotational Framework for Comparing Models of Computation

Technical Memorandum UCB/ERL M97/11.



P. Lieverse, P. van der Wolf, E. Deprettere, K. Vissers (Edited by: L. G. Chen, H. M. Hang, I. Kuroda)

A methodology for architecture exploration of heterogeneous signal processing systems

1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation

J. Hill, R. Szewczyk, A. Woo, S. Hollar, D. Culler, K. Pister

System architecture directions for network sensors




C. L. Liu, J. W. Layland

Scheduling algorithms for multiprogramming in a hard-real-time environment

Journal of the Association for Computing Machinery, vol.20, (no.1), Jan. 1973

Page 3 of 8 Relevant Publications

F. Balarin, L. Lavagno, P. Murthy, and A. Sangiovanni-Vincentelli

Scheduling for Embedded Real-Time Systems

IEEE Design and Test of Computers 1998


Software Estimation and Software Synthesis

K. Suzuki and A. Sangiovanni-Vincentelli

Efficient Software Performance Estimation Methods for Hardware-Software Codesign

Proceedings of Design Automotion Conference 1996, pp266-290

P. K. Murthy, S. S. Bhattacharyya, and E. A. Lee,

Joint Minimization of Code and Data for Synchronous Dataflow Programs

Journal of Formal Methods in System Design, Vol. 11, No. 1, pp41-70, July 1997.

Y.-T. S. Li, S. Malik

Performance analysis of embedded software using implicit path enumeration

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Dec. 1997, vol. 16, (no.12):1477-87

P. G. Paulin, C. Liem, M. Cornero, F. Nacabal, G. Goossens

Embedded software in real-time signal processing systems: application and architecture trends

Proceedings of the IEEE, vol. 85, (no.3), IEEE, March 1997, p. 419-35

G. Goossens, J. Van Praet, D. Lanneer, W. Geurts, A. Kifli, C. Liem, P. G. Paulin

Embedded software in real-time signal processing systems: design technologies

Proceedings of the IEEE, vol. 85, (no.3), IEEE, March 1997, p. 436-54

Balarin, F.; Chiodo, M.; Giusto, P.; Hsieh, H.; Jurecska, A.; Lavagno, L.; Sangiovanni- Vincentelli, A.;Sentovich, E.M.; Suzuki, K.

Synthesis of software programs for embedded control applications

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.18, (no.6), IEEE, June 1999. pp834-849


Platform-based Design

A. Sangiovanni-Vincentelli, A. Ferrari

System Design - Traditional Concepts and New Paradigms

Proceedings of ICCD 99, Austin, October, 1999, pp.2-12

K. Keutzer, A. R. Newton, J. Rabaey, A. Sangiovanni-Vincentelli

System-level design: orthogonalization of concerns and platform-based design

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.19, (no.12), IEEE, Dec. 2000 Page 4 of 8 Relevant Publications


A. Sangiovanni-Vincentelli

Defining Platform-based Design

EEDesign, February, 2002


Communication-based Design

A. Sangiovanni-Vincentelli, M. Sgroi, L. Lavagno

Formal Models for Communication-based Design

Proceedings of CONCUR 2000, August, 2000

M. Sgroi, M. Sheets, A. Mihal, K. Keutzer, S. Malik, J. Rabaey, A. Sangiovanni-Vincentelli

Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design

Proceedings of DAC 2001, June 18-22, 2001, Las Vegas, Nevada, USA

J. Burch, R. Passerone, A. Sangiovanni-Vincentelli

Overcoming Heterophobia: Modeling Concurrency in Heterogeneous Systems

Proceedings of Application of Concurrency to System Design, Newcastle, UK, 2001

A. Pinto, L. Carloni, A. Sangiovanni-Vincentelli

Constrait-Driven Communication Synthesis

Proceedings of DAC 2002, June 10-14, 2002, New Orleans, LA, USA


TTP and FlexRay

Kopetz, H.; Grunsteidl, G.

TTP - A Protocol for Fault-Tolerant Real-Time Systems

Computer, vol.27,(no.1), Jan. 1994. p.14-23

H. Kopetz

The Time-Triggered Model of Computation

19th IEEE Systems Symposium, Madrid, Spain, December, 1998

R. Belschner, et al.

FlexRay Requirements Specification


Interface-Based Design

J. Rowson and A. Sangiovanni-Vincentelli

Interface-based Design

Proceedings of Design Automation Conference 1997, pag. 178-183.

Page 5 of 8 Relevant Publications


R. Passerone, J. Rowson and A. Sangiovanni-Vincentelli

Automatic Synthesis of Interfaces between Incompatible Protocols

Proceedings of Design Automation Conference 1998, pag. 8-13

P. Chou, K. Hines, R. Ortega, K. Partridge, G. Borriello.

ipChinook: An Integrated IP-based Design Framework for Distributed Embedded Systems

Proceedings of the 36th ACM/IEEE Design Automation Conference, New Orleans, LA, June


L. P. Carloni, Kenneth L. McMillan, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli.

A Methodology for Correct-by-Construction Latency Insensitive Design

Proceedings of the Internaltional Conference on Computer-Aided Design, 1999.

L. P. Carloni, Kenneth L. McMillan, Alberto L. Sangiovanni-Vincentelli.

Latency Insensitive Protocols

Proceedings of the 11th International Conference on Computer-Aided Verification, Trento, Italy, July 1999.

R. Passerone, L. Alfaro, T. A. Henzinger, A. Sangiovanni-Vincentelli

Convertibility Verification and Converter Synthesis: Two Faces of the Same Coin

International Conference on Computer Aided Design 2002, November, 2002


Component-based Design

L. de Alfaro, T.A. Henzinger

Interface Theories for Component-Based Design

Proceedings of First Workshop on Embedded Software, EMSOFT2001, Lake Tahoe, CA, USA, Oct. 8-10, 2001

E. A. Lee, Y. Xiong

System-Level Types for Component-Based Design

Proceedings of First Workshop on Embedded Software, EMSOFT2001, Lake Tahoe, CA, USA, Oct. 8-10, 2001


UML in Embedded System Design

G. Booch, J. Rumbaugh, I. Jacobson

The Unified Modeling Language User Guide

Addison-Wesley, c1999 (This is a book)

G. Martin, L. Lavagno, J. Louis-Guerin

Embedded UML: a merger of real-time UML and co-design

Proceedings of CODES 2001, Copenhagen, April 2001, pp.23-28

R. Chen, M. Sgroi, G. Martin, L. Lavagno, A. Sangiovanni-Vincentelli, J. Rabaey

Embedded System Design Using UML and Platforms

Page 6 of 8 Relevant Publications

Proceedings of FDL 2002, Marseille, France, September 2002


Design Methodologies and Tools



F. Balarin, L. Lavagno, C. Passerone, A. Sangiovanni-Vincentelli, M. Sgroi, Y. Watanabe

Modeling and Designing Heterogeneous Systems

Advances in Concurrency and System Design, Springer-Verlag, 2002

F. Balarin, L. Lavagno, C. Passerone, Y. Watanabe

Processes, interfaces and platforms. Embedded software modeling in Metropolis

Proceedings of EMSOFT'02, Grenoble, France, October, 2002

J. R. Burch, R. Passerone, A. L. Sangiovanni-Vincentelli

Using Multiple Levels of Abstractions in Embedded Software Design

Proceedings of the second International Conference on Application of Concurrency to System Design, June, 2001



F. Balarin, M. Chiodo, A. Jurecska, H. Hsieh, A. L. Lavagno, C. Passerone, A. Sangiovanni-Vincentelli, E. Sentovich, K. Suzuki, B. Tabbara

Hardware-Software Co-Design of Embedded Systems: The Polis Approach

Kluwer Academic Press, June 1997.



E. A. Lee

Overview of the Ptolemy Project

Technical Memorandum UCB/ERL M01/12, University of California, Berkeley, March, 2001



S. Liao, S. Tjiang, R. Gupta

An efficient implementation of reactivity for modeling hardware in the Scenic design environment

Proceeding of the 34th Design Automation Conference, Anaheim, CA, usa, 9-13 June 1997

R. K. Gupta, S. V. Liao

Using a programming language for digital system design

IEEE Design and Test of Computers, April-June 1997, vol. 14, (no. 2):72-80




D. Verkest, K. Van Rompaey, I. Bolsens, H. De Man

CoWare - a design environment for heterogeneous hardware/software systems

Design Automation for Embedded Systems, Oct. 1996, vol. 1, (no.4):357-86.

Page 7 of 8 Relevant Publications

I. Bolsens, H. J. De Man, B. Lin, K. Van Rompaey, and others

Hardware/software co-design of digital telecommunication systems

Proceedings of the IEEE, March 1997, vol. 85, (no. 3):391-418.


Copyright 2001 - 2016   Mark McDermott