X. Xi, A. Aysu and M. Orshansky, “Fresh Re-keying with Strong PUFs: A New Approach to Side-Channel Security,” to appear at HOST, 2018.
A. Aysu, M. Tiwari, and M. Orshansky, “Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange Protocols,” to appear at HOST, 2018.
A. Aysu, M. Orshansky, and M. Tiwari, “A Novel Hardware Design for Binary Ring-LWE with Power Side-channel Resilience,” to appear at Design Automation and Test in Europe (DATE), 2018.
Y. Wang and M. Orshansky, “Efficient Helper Data Reduction in SRAM PUFs via Lossy Compression,” to appear at Design Automation and Test in Europe (DATE), 2018.
A. Kumar, C. Scarborough, A. Yilmaz and M. Orshansky, “Efficient Simulation of EM Side-Channel Attack Resilience,” International Conference on Computer-Aided Design (ICCAD), Nov. 2017. Best Paper Award Nomination.
X. Xi, H. Zhang, N. Sun, and M. Orshansky, “Strong Subthreshold Current Array PUF with 265 Challenge-Response Pairs Resilient to Machine Learning Attacks in 130nm CMOS,” Proc. of VLSI Circuits Symposium, Kyoto, Japan, June 2017.
S. Jeloka, K. Yang, M. Orshansky, D. Sylvester, D. Blaauw, “A sequence dependent challenge-response PUF using 28nm SRAM 6T bit cell,” In VLSI Circuits Symposium, 2017.
A. Aysu, W. Wang, P. Schaumont, and M. Orshansky, “A new maskless debiasing method for lightweight physical unclonable functions,” Proc. of Hardware-Oriented Security and Trust (HOST), May 2017.
M. Kalyanaraman and M. Orshansky, “Novel Strong PUF Based on Nonlinearity of MOSFET Subthreshold Operation,” Proc. of IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), June 2013. Best Paper Award Nomination.
M. Kalyanaraman and M. Orshansky, “Highly
Secure Strong PUF based on Nonlinearity of MOSFET Subthreshold Operation,”
Cryptology ePrint Archive: Report 2012/413, 2012.