ECE 382N, Spring 2000
Y. N. Patt, M. D. Brown
Homework #4, Due: March 8, 2000.
The next step in your computer design is to add the control. This is
the last assignment in which you will be
working as an individual. Starting with Assignment 5, you will be producing one product for your group.
In this assignment, you will specify the mechanism for generating the
control signals which control the data path.
If you are planning to use hard-wired control, this means specifying the finite state machine. If you are planning
to use microprogrammed control, this means specifying the microinstruction, its fields, the micro-orders which
make up each field, and the microsequencer for obtaining the address of the next microinstruction. If you are
planning to pipeline your design (highly recommended), then it is important to provide not only control of each
instruction through the pipeline, but sufficient interlocks to ensure safe execution of the instruction sequence.
Hand in hard copies of the schematics of the control structure you create.
Specify all the control logic (microcode or hardwired) required to completely
emulate one x86 instruction (you
choose the instruction and addressing modes of the operands) from the fetch of the instruction to the destination
write (i.e., storing the result). Use Verilog to simulate and verify that your design works for that one instruction.
Use Signalscan to monitor important data and signals in the CPU. Hand in annotated hard copies of your
signalscan graphs. Use several pages if needed, and make sure that the values of all signals are readable on the
Hand in a block diagram of your datapath with explanations to clarify
what the signals on the signalscan graphs