EE 360N, Spring 2001
Y. N. Patt, Instructor
Kameswar Subramaniam, Onur Mutlu, TAs
Lab Assignment 3; Due April 8, 2001, 11.59pm
For lab 3, you will implement interrupts and exceptions for the LC-2 using your simulator from lab 2. The input to the simulator will be:
The address space of the LC-2 is divided into pages of 512 locations (9 bits).
Hence, page 0 is from 0x0000 to 0x01ff; page 1 is from 0x0200 to 0x03ff, and so on.
Memory page 0 is a reserved section of memory. Any reference to a memory
location in page 0 should generate a protection exception. When an exception
occurs, 1 is subtracted from the PC, the value of the PC is pushed onto
the stack, and control is passed to the exception handler located at 0x0300.
The memory reference should not complete.
Interval Timer Interrupt
For this simulation, the interval timer interrupt will occur every 10 microseconds with a clock rate of 100MHz. The interval timer generates an interrupt, which is detected after the current instruction has finished executing. When the interrupt is detected, the current value of the PC is pushed onto a stack pointed to by R6, R6 is incremented before each push, and the PC is loaded with the contents of a register called the interrupt address register (IAR). IAR fits into the current LC-2 datapath as shown in the diagram at
lab3_datapath.psThis register should be initialized by the simulator. The IAR points to the beginning of the interrupt service routine (location 0x0200), which performs a task and returns to the interrupted procedure when it finishes. R6 should be loaded with the value 0x1FFF at the start of your program.
You will implement the mechanism to push the current PC onto the stack in microcode. The first step in this lab is to determine how the state diagram of the LC-2 can be modified to handle interrupts. You will have to augment the microsequencer with additional logic to sequence these new states, and extend the existing microinstructions with additional bits for both the microsequencer and the datapath. You may augment current microinstruction fields and add new fields. You are free to implement this as you wish, but you must document your method.
Next, you have to implement an instruction for returning from an interrupt. This will be used in the service routine to transfer control back to the interrupted program. This instruction, called RTI (return from interrupt), has the opcode 1000, and pops the old PC off the stack and loads them into the corresponding registers. In implementing this instruction, you need to decrement R6. (See the ISA reference for details on the RTI instruction)
Generating the interrupt will be left up to you. A feasible method would
include a routine which counts cycles and sets the interval timer interrupt
after a certain number of cycles have elapsed.
Memory page 0 is reserved for various system information and cannot be referenced by an application program. Whenever an application program accesses a location in page 0, a protection exception occurs. An exception can occur during any execution cycle. When detected, an exception should cause the PC to decrement by one, the value of the PC is pushed onto a stack pointed by R6, R6 is incremented before each push, and the PC is loaded with the contents of a register called the memory exception address register (MEAR). This register should be initialized by the simulator. The exception handler is simply a program that halts the machine. Be sure the memory operation doesn't take place.
Again, you are to implement the exception detection in microcode. The
exception condition must be generated in the memory phase of the simulation
cycle. In the following microinstruction, the exception should be found
by the logic in the microsequencer, which will trigger the execution of
the exception handler. Hint: think about adding another mux to the microsequencer.
Testing the simulator
To test the simulator, you'll write a program to be loaded into memory location 0x0200, a program to be loaded into memory location 0x0300, and another program to be loaded into memory location 0x0400. The program in location 0x0400 will first load the value x0001 into memory location 0x3000, then proceed to increment it in a loop. Once the contents of 0x3000 reach x400, the program will save the contents of register 0 in memory location 0x0000 which will cause a protection exception, halting the program.
The program in memory location 0x0200 will be the interrupt service routine. It will simply increment a counter at memory location 0x3001 and then RTI to the interrupted program.
What To Submit
If you feel that a word document (or any other format) is more convenient, make sure that you convert it into a form which can be viewed on unix. An easy way of doing this is to print the word document, and choose the "print to file" option - this will create a postscript file which can be viewed on unix.