This problem should read (Changes written in boldface):
We have been referring to the LC-2 memory as 64 Kwords of memory, word-addressible. This is the memory that the user sees, and may bear no relationship to the actual physical memory. Suppose the actual physical address space is 8Kwords, and we keep the notion of 512 word pages. What is the size of the PFN? Suppose we use the VAX convention of partitioning the virtual address space into User Space (P0) and System Space, with 48 Kwords of user space and 16 Kwords of system space. Suppose we further insist, like the VAX that System Page Table remains resident in physical memory. If each PTE contained, in addition to the PFN, a Valid bit, a modify bit, and two bits of access control, how many bits of physical memory would be required to store the System Page Table?
In this problem, the virtual memory space is NOT divided into user space
and kernel space. That is a feature specific to the Virtual Memory System
of the VAX architecture.
The LRU schemes referred to in parts a and b of Problem 3 are both "perfect" LRU replacement schemes in which the cache accurately keeps track of the least recently used block.