Please see the problem set for the updated Problem 1.
Assume that:
Assume that the virtual memory system added uses a one-level translation
scheme and the page table is always resident in physical memory.
An instruction is said to generate a page fault if a page fault occurs
during the processing of that instruction.
Don't forget to answer "part d" for problem 6:
(d) Show the state of the reservation stations (node tables) and
the register file (with the valid bits and the tags) in part (c) after the
execution of each instruction. Assume that the adder and the multiplier
both have 4 entries in their associated reservation stations. Use symbolic
tags for renaming as Professor Patt did in class. The structure of the
reservation stations and register file (register alias table) should be
the same as explained in
lecture.
(c) Tomasulo's algorithm with one multiplier and one adder.
(d) Show the state of the reservation stations (node tables) and
the register file (with the valid bits and the tags) in part (c) after the
execution of each instruction. Assume that the adder and the multiplier
both have 4 entries in their associated reservation stations. Use symbolic
tags for renaming as Professor Patt did in class. The structure of the
reservation stations and register file (register alias table) should be
the same as explained in
lecture.