You are encouraged to work on the problem set in groups and turn in one problem set for the entire group. Remember to put all your names on the solution sheet. Also remember to put the name of the TA in whose discussion section you would like the problem set turned back to you.
Having designed a binary adder, you are now ready to design a 2-bit by 2-bit unsigned binary multiplier. The multiplier takes two 2-bit inputs
B[1:0] and produces an output
Y which is the product of
B[1:0]. The standard notation for this is:
Y = A[1:0]⋅B[1:0]
Yfrom the truth table using only
Using Figure 3.21, the diagram of the 4-entry, 22-by-3-bit memory.
The IEEE campus society office sells sodas for 35 cents. Suppose they install a soda controller that only takes the following three inputs: nickel, dime, and quarter. After you put in each coin, you push a pushbutton to register the coin. If at least 35 cents has been put in the controller, it will output a soda and proper change (if applicable). Draw a finite state machine that describes the behavior of the soda controller. Each state will represent how much money has been put in (Hint: There will be seven of those states). Once enough money has been put int, the controller will go to a final state where the person will receive a soda and proper change (Hint: There are five such final states). From the final state, the next coin that is put in will start the process again.
Prove that the
NOR gate, by itself, is logically complete (see Section 3.3.5) by constructing a logic circuit that performs the
AND function, a logic circuit that performs the
NOT function, and a logic circuit that performs the
OR function. Use only
NOR gates in these three logic circuits.
The frequency of a computer is inversely proportional to its clock cycle time. That is to say, Frequency = 1/Cycletime, e.g.: a 1GHz computer has a clock cycle time of 1 nanosecond (10-9 seconds).
Instructions may broadly be divided into those that access memory (loads and stores), those that perform arithmetic/logic operations(
OR etc) and other instructions such as branch and jump instructions (these determine what is known as control flow). An instruction can take multiple clock cycles to execute. Let us assume that in a particular computer memory access instructions take 12 clock cycles to execute, arithmetic instructions take 9 clock cycles to execute, while other instructions take 10 clock cycles to execute.
The approximate percentages of occurrence of these instructions in a given program, on an average, are:
|Type of Instruction||Percentage of Occurence|
|Memory Access instructions||40%|
|Arithmetic and Logic instructions||40%|
On a 3.2 GHz machine, assuming everything goes smoothly, estimate how long will this 650,000 instruction program take to execute?
What is the word length of a computer? How does the word length of a computer affect what the computer is able to compute? That is, is it a valid argument, in light of what you learned in Chapter 1, to say that a computer with a larger word size can process more information and therefore is capable of computing more than a computer with a smaller word size?
Suppose a 32-bit instruction takes the following format:
If there are 255 opcodes and 120 registers,
UNUSEDbits in the instruction encoding?
Examples 4.1, 4.2, and 4.5 illustrate the processing of the
JMP instructions. The
MDR are written in various phases of the instruction cycle, depending on the opcode of the particular instruction. In each location of the table below, enter the opcodes which write to the corresponding register (row) during the corresponding phase (column) of the instruction cycle.
|Fetch Instruction||Decode||Evaluate Address||Fetch Data||Execute||Store Result|
HALT instruction can clear the
RUN latch, thereby stopping the instruction cycle, what instruction is needed to set the
RUN latch, thereby reinitiating the instruction cycle?
Suppose that an instruction cycle of the LC-3 has just finished and another one is about to begin. The following table describes the values in select LC-3 registers and memory locations:
For each phase of the new instruction cycle, specify the values that
R2 will have at the end of the phase in the following table:
Hint: Example 4.2 illustrates the
LDR instruction of the LC-3. Notice that values of memory locations
3003 can be interpreted as