The student wrote again. I think he does not understand what this
left-shifting is all about.  If you feel you do understand it, then delete
and move on.  Since I never know if a question represents more general
misunderstanding, I feel compelled to answer thoroughly.
Now, then:

        Dr Patt,
        The ISA documentation posted indicated that the offset6 field for the
        instructions STW and LDW and the trapvect8 of the TRAP instruction is
        left shifted one bit left when it is being executed.

That is correct.

        The assembler on the website does not seem to take this into account.
        For example the instruction LDW R0, R0, #-32 comes back as 0x6020.

As indeed it should.  The example you provide asks the hardware to do the
following: Use the value in R0 as a Base Address, add to it -32 WORDS,
and use the result of that as the memory address.  Then get the contents
of that address (and the next one, since memory is byte addressible) and
load those 16 bits into R0.
Note: to add -32 words to a Base Address, the hardware must first multiply
-32 by 2, since the ISA is byte-addressible.
The assembler should translate your instruction into 0110 000 000 100000,
which it does: 0x6020.

        When I hand assemble and take the run time left shift into account
        by right shifting once the result I get is 0x6060.  This also
        means the range of values acceptable to the assembler is cut in half.

Yes, if you right shift, you would cut the range in half.  But, I do not
understand why you would want to right shift.  The point of all this is to
allow the programmer to get full use of the six bits by expressing the
offset in words, not bytes.  AND, have the hardware do what is necessary
to turn that word offset into a byte offset at run time.  If you right shift,
you have just effectively undone the benefit of the left shifting that the
hardware does for you.  If we wanted that, it would have been simpler to
specify the offset as a byte offset and not require any shifting at all.
But then, we would have only half the range.

        Is this a problem with the assembler or the documentation or my
        understanding of what is going on?

There is no problem with the assembler or the documentation.
Again, the offset you specify is the number of WORDS of offset you want
the hardware to use in computing the effective address.  Since the ISA
is byte-addressible, the hardware multiplies this number by 2 before
adding it to the Base address.
Yale Patt