A student writes:

        Dr. Patt,
        I was looking at the JMP state (state 12) And had a question.
        Looking at
        the data path, it appears that there could be 2 ways for the PC to be
        loaded with BaseR.  One way, it would seem, that the SR1 goes
        through the
        SHF (since IR[5:0] are all 0's, there would be no shift), onto the bus
        (enabling the GateSHF) and being attached to the PC through the bus
        (selecting BUS from PCMUX).  Another way would be that the SR1 goes to
        ADDR1MUX, added with 0 through the adder (selecting  the ZERO
        through the
        ADDR2mux) and loaded into the PC (selecting ADDDER from the PCMUX)
        disabling all the gates.  I was wondering how should we implment our
        control store even though both ways would work.  Thanks.
        <<name withheld to protect the man with too many choices>>

It is not unusual for the data path to provide sufficient richness
that a particular operation can be implemented more than one way.
In this case, one way uses the bus, the other way doesn't.  Question:
do you need the bus in this microcycle for anything else?  If not,
then you the microarchitect get to choose.  If you do, then you don't
have a choice.
Yale Patt