Two students write:

        Dear Dr. Patt,

        On question one of the problem set #2, the last two sentences say "The
        inputs to the logic circuit are n[3:0], m[3:0], and s[3:0]. The output 
        is 0 if no overflow occurs and 1 if an overflow does occur."

        Does this mean that we are supposed to construct a logic circuits that
        includes all of the possible inputs for n, m, and s or 
        are n[3:0], m[3:0], and s[3:0] the possible inputs that are allowed?

        Thank you.
        <<name withheld to protect the first student>>

        Professor Patt,

        I have been able to understand most of problem set two up until 
        this point but I am still having trouble with question 1. I don't 
        know where to begin.  Do I need to pay certain attention to the 
        leading or trailing digits or should I focus on the binary digits 
        as a whole? Also, I really don't understand how the AND, OR, and 
        NOT functions can correspond to the overflow of the sum of two digits. 
        Thanks for any help you can provide.

        <<name withheld to protect the second student>>

So, first let me apologize for just getting to this now.  The two emails
came in on Friday, and I was out of town from Thursday afternoon until a
couple of hours ago.  Now I am in my office and trying to get through my
email.  I am also hoping to read your Student Information Sheets but that
may have to wait.

So, to respond...

I suppose the easiest thing to do is to say, Wait until tomorrow's lecture
when I plan to show you how to use AND, OR, and NOT gates to make decisions 
that are far more complicated than, "Are all the inputs 1?" or "Are they
all 0?"

What I am asking in problem 1 is for you to design a logic circuit that
examines the inputs and output of an ALU that is adding two numbers, and 
identifies whether or not an overflow occurs.

There are 12 inputs to this circuit.  (Some of them may be vaccuous -- that
is, they are irrelevant to the problem we are solving.)  Each of the two 
source operands consists of 4 bits, and the result consists of 4 bits.  There 
is one output of the circuit: 0 = no overflow occurs, 1 = overflow occurs.  
Your job: Design a logic circuit (i.e., consisting of AND, OR, and NOT gates) 
that accomplishes just that.

In class tomorrow, I am planning to show you how to do this kind of design.  
In fact, I am going to design for you a special alarm clock that you will be 
able to use after you graduate -- one that will ring based on whether you need 
to get up and go to work (at 7am), or get up and play golf on the weekend 
(at 7am), or if it is raining and it is the weekend, you can sleep until 9am.
That is, we will construct a logic circuit (using AND, OR, and NOT gates)
that will cause the alarm clock to ring.

There will be four input variables:

1: weekday/weekend
2: sunny/raining
3: 7am/not_7am
4: 9am/not_9am

AND, one output variable: 0 = don't ring, 1 = ring.

We will construct the logic circuit in class.  That should help you do this
homework problem.

Good luck.
Yale Patt