10/13/2006

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A student writes:

Hello Professor Patt,

I wanted to say I learned a lot from your lecture today. But near the
end you did go a little quick to beat the time i got a quick question.
In line x3003 (0000010000000001) and line x3005 (0000100000000001) you
said that the |n|z|p| values are the 11,10,9 bits.

Thank you for the nice words about my lecture on Wednesday.
More importantly, thank you for the questions about the
conditional branch instructions at x3003 and x3005.

First, I apologize for not getting to this until tonight.
It has been a very busy week.  I will try to make up for
it with a very detailed explanation, with plenty of examples.
For those of you who already understand this concept, feel free
to delete and move on.  But many students find it a little
difficult, so I would rather err on the side of giving those
who want it plenty of detail.

I'm having a hard time wording my question because i don't completely
understand, but i will try my best. Why aren't you seeing if the value
of what ever were looking at is positive (ie. |0|0|1| ).

It appears that
we finish the program if the 'z' value is set and we continue if 'n'
value is set.

Sorry for my wording. If you don't understand what I'm trying to ask
here I will just try with my TA on Friday.

Thanks,
<<name withheld to protect the student having a hard time wording...>>

Perhaps the crux of the difficulty (and it is not uncommon) is
in understanding the difference between the three condition codes
(the one-bit N,Z, and P registers) and the three bits [11:9] in
the instruction, which we call n,z, and p.

The condition code one-bit registers are set by EVERY instruction that writes
a value into one of the registers R0 to R7.  For example, when the LC-3
executes the instruction at x3006, and writes the sum of R0 and R3 into R0,
the condition codes are set.  When the LC-3 executes the instruction at
x3002 and writes the value stored in memory location x300B into R2, the
condition codes are set.  The condition codes are set according to whether
the value written into the register is negative (N is set to 1, others set to
0), zero (Z is set to 1, others set to 0), or positive (P is set to 1, the
others are set to 0).

So, the condition codes reflect what has actually been written into the
register the last time something was written into a register.  If an
instruction does not write to one of the registers R0 to R7, the one-bit
condition code registers are not touched.  They continue to keep whatever
was in them before the instruction.

Bits[11:9], which we refer to as n,z,and p (NOTE the lower case, as opposed
to capitals for the N,Z,P one-bit condition code registers) are bits in the
instruction that tell us which condition codes to look at to determine
whether or not to branch.

The notion is: If ANY of the one-bit registers specified by the
corresponding bits[11:9] of the instruction is set, then the branch
is taken.  If NONE of the one-bit registers specified by bits[11:9]
is set, then the PC is left alone, and the next instruction in sequential
order is executed next.

For example, what if bits[11:9] were 101. The instruction tells the
computer: Bit[11]=1, therefore check to see if the N condition code
is set.  Bit[10]=0, therefore do not check the Z condition code.  Bit[9]=1,
therefore check to see if the P condition code is set.  The branch would
be taken if either the N bit or the P bit were set.  This would be the
case if the value written to the register was anything other than 0.  If
the value were negative, N would be set.  If the value were positive, P
would be set.  Since the instruction specifies 101, both N and P are
checked.  The ONLY way the branch would not be taken would be if N and Z
are both 0, and the only way that could be is if the value written were
zero.

Got it?  Just to be sure, let me break down the two instructions you referred
to according to their fields:

x3003   0000 010 000000110
x3005   0000 100 000000001

Bits[15:12] contain the opcode 0000, which means "conditional branch"
based on the whether ANY of the RELEVANT condition codes is set.

A condition code is RELEVANT if its corresponding bit in the instruction
is a 1.  That is, if bit[11] is 1, the N condition code is relevant.  If
bit[10] is 1, the Z condition code is relevant.  If bit[9] is 1, the P
condition code is relevant.

N, Z, and P are one-bit condition codes, one of which is set every time
a general purpose register is loaded with a Negative, Zero, or Positive
value.

To execute a BR instruction, the computer examines ONLY the relevant condition
codes.  If any are set, the new address is loaded into PC, and the sequential
flow of instructions is altered.  If NONE of the relevant condition codes  are
set, the PC is not altered, and the sequential flow of instructions continues
unmolested.

That is, we sign-extend bits[8:0] to 16 bits, and add it to the PC (which
was incremented during the Fetch phase.  This is then loaded into the PC,
and the program continues at that point.

So, when the instruction at x3003 is executed, only the Z condition code is
examined since bit[10]=1 and the other two are 0.  If Z is 1, the PC is
loaded with x300A (which is the sum of x3004 + x0006).  If Z is 0, the PC
remains at x3004.

When the instruction at x3005 is executed, only the N condition code is
examined since bit[11]=1 and the other two are 0.  If N is 1, the PC is
loaded with x3007 (which the sum of x3006 and x0001).  If N is 0, the PC
remains at x3006.  The effect of this is to skip the instruction at x3006
if the value loaded into R3 is negative.  That is a good idea since x3006
directs the computer to add that value to the SUM -- something we would
not want to do if the value was negative.

Hope this helps.

Yale Patt

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