You are encouraged to work on the problem set in groups and turn in one problem set for the entire group. Remember to put all your names on the solution sheet. Also remember to put the name of the TA in whose discussion section you would like the problem set turned back to you.
You will need to refer to the assembly language handouts and the LC-3b ISA on the course website.
Briefly explain the difference between the microarchitecture level and the ISA level in the transformation hierarchy. What information does the compiler need to know about the microarchitecture of the machine for which it's compiling code?
Classify the following attributes of LC-3b as either a property of its microarchitecture or ISA:
Both of the following programs cause the value
x0004 to be stored in location
x3000, but they do so at different times.
Explain the difference.
.ORIG x3000 .FILL x0004 .END
.ORIG x4000 AND R0, R0, #0 ADD R0, R0, #4 LEA R1, A LDW R1, R1, #0 STW R0, R1, #0 HALT A .FILL x3000 .END
Classify the LC-3b instructions into Operate, Data Movement, or Control instructions.
x3E00, we would like to put an
instruction that does nothing. Many ISAs actually have an opcode devoted
to doing nothing. It is usually called NOP, for NO OPERATION. The instruction
is fetched, decoded, and executed. The execution phase is to do nothing!
Which of the following three instructions could be used for NOP and have
the program still work correctly?
0001 001 001 1 00000
0000 111 000000010
0000 000 000000000
What does the
ADD instruction do that the others do not do?
Consider the following possibilities for saving the return address of a subroutine:
Which of these possibilities supports subroutine nesting, and which supports subroutine recursion (that is, a subroutine that calls itself)?
A small section of byte-addressable memory is given below:
Add the 16-bit two's complement numbers specified by addresses
Say we have 32 megabytes of storage, calculate the number of bits required to address a location if
A zero-address machine is a stack-based machine where all operations are done using values stored on the operand stack. For this problem, you may assume that its ISA allows the following operations:
PUSH M- pushes the value stored at memory location M onto the operand stack.
POP M- pops the operand stack and stores the value into memory location M.
OP- Pops two values off the operand stack, performs the binary operation OP on the two values, and pushes the result back onto the operand stack.
Note: To compute A - B with a stack machine, the following sequence
of operations are necessary:
SUB. After execution of
A and B would no longer be on the stack, but the value A-B would be at
the top of the stack.
A one-address machine uses an accumulator in order to perform computations. For this problem, you may assume that its ISA allows the following operations:
LOAD M- Loads the value stored at memory location M onto the accumulator.
STORE M- Stores the accumulator value into Memory Location M.
OP M- Performs the binary operation OP on the value stored at memory location M and the value present in the accumulator. The result is stored back in the accumulator (ACCUM = ACCUM OP M).
A two-address machine takes two sources, performs an operation on these sources and stores the result back into one of the sources. For this problem, you may assume that its ISA allows the following operation:
OP M1, M2- Performs a binary operation OP on the values stored at memory locations M1 and M2 and stores the result back into memory location M1 (M1 = M1 OP M2).
OP can be
MUL for the purposes of this problem.
Note 2: A, B, C, D, E and X refer to memory locations and can be also used to store temporary results.
Write the assembly language code for calculating the expression (do not simplify the expression):
Give an advantage and a disadvantage of a one-address machine versus a zero-address machine.
The following table gives the format of the instructions for the LC-1b computer that has 8 opcodes.
LEAis always register R0. (e.g.
LDImm #12loads decimal 12 to register R0.)
BR, it contains the target address of the branch. In the case of
LD, it contains the address of the source of the load. In the case of
ST, it contains the address of the destination of the load.
ANDprovide immediate addressing by means of a steering bit, bit, labeled A. If A is 0, the second source operand is obtained from SR. If A is 1, the second source operand is obtained by sign-extending bits[1:0] of the instruction. A bit is called a “steering” bit if its value “steers” the interpretation of other bits (instruction bits 1:0 in this case).