Tue, 17 Sep 2013, 16:25

A student writes:

> Dear Dr. Patt,
> I asked one of the TA's why the AND gate at the transistor level is
> composed of a NAND and then a NOT circuit, and he said that the number of
> other configurations is restricted because the n-type transistor cannot
> connect to the positive end of the battery and the p-type transistor cannot
> connect to the negative end without unpredictable voltage drops. Can you
> please elaborate on this, or do I have to wait for a later class?
> Thank you,
> <<name withheld to protect one who prefers to not wait for a later class>>

This question keeps coming up, so I probably ought to add an *optional*
paragraph in the 3rd edition to answer it once and for all.  It is really
not central to our work, but certainly does affect the way circuit designers
connect P-type and N-type transistors to make logic gates.

So, if you understand how and why the AND-gate in chapter 3 works and are
happy with that, and not curious why one can not design the AND-gate with
fewer transistors as I am about to show you, then simply put this email aside
and move on.

For the curious, here goes:
It turns out that the electrical properties of the P-type transistor is
such that if we connect it to the power supply (2.9 volts in the book), and
we have 0 volts on the gate, the transistor acts like a piece of wire and
there is no voltage across the transistor.  The same is true for an N-type
transistor connected to ground (0 volts) and 2.9 volts on the gate.

We designed our circuits in class yesterday, and in the book with P-type
transistors connected to 2.9 volts and N-type connected to 0 volts for
exactly that reason.  We wanted the transistor to act like a piece of
wire or an open (broken) circuit, depending on the voltage on the gate.

The electrical properties of these transistors are such that if we connect
an N-type transistor to the power supply (2.9 volts in the book) and we apply
2.9 volts to the gate of the transistor, instead of getting a piece of wire, 
we end up with a voltage drop, which is called the transmission voltage of 
the transistor.  Similarly for the P-type transistor connected to ground 
with 0 volts applied to the gate of the transistor.  The transmission voltage
is about 0.7 volts. 

So, if we tried to design an AND gate using fewer transistors as some of you
would like to do (and please excuse the use of N and P rather than the correct 
symbols, since my low-tech ASCII keyboard does have its limitations):

                          - 2.9 volts                            
                        a - N                             
                        b - N                                 
                          |       |                             
                      a-P   b-P                             
                          |       |                             
                          V       V  0 volts                

Instead of the output being 2.9 volts if a=b=1, the output would be more
like 1.5 volts, since the transmission voltage is .7 volts across each 
transistor.  And, instead of the voltage being 0 volts if either a or b =0,
the output would be .7 volts.

Certainly one can tell the difference between 1.5 volts and .7 volts.
However, much better to tell the difference between 2.9 and 0 volts.

And, if we reduce the power supply voltage from 2.9 to something smaller,
it would not take very much to make it very difficult to distinguish a 
"1" from a "0" at the output.


Again, this is not central to the core fundamentals of EE306, so I am happy
to discuss it further privately, or you can feel free to not worry about it
until you get into the EE electronics courses.

Hope the above helps.  See you in class tomorrow.

Yale Patt