Sat, 21 Sep 2013, 19:17

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If you feel comfortable with the discussion on memory last Wednesday in class,
feel free to delete this message and move on.  If any of it was unclear, ...

A student writes:

> Dr. Patt,
> I didn't understand the part of Wednesdays lecture over memory and I was
> hoping the TA's would get to it today, but they weren't able to. If you
> aren't planning on going over it again on monday, could I make an
> appointment for it?  And by memory I mean the memory address logic we
> went over.

he has, but it is still confusing to him.  And, he agreed to ask the other
guys in his study group, which of course is the right "next" step.

Meanwhile, since some of the rest of you may have had trouble with this, I am
responding.

Why do we need "memory address logic"?

Answer: because memory is made up of a lot of locations, and we want to
access only one or a very few of them at this one point in time.  When we get
to the LC-3 late next week, you will see that if we are dealing with the LC-3,
we only want to access one location at a time.

In the memory I drew on the board, we had 12 storage cells, broken down into
four locations containing three bits each.  We could have drawn an 8 gigabyte
memory, but we did not have enough blackboard or enough chalk.  At the rate
I break chalk, we would have run out of chalk long before I finished drawing
the 8 gigabytes.  So we settled for four locations of three bits each.  ...which
is really enough to illustrate the point.

We say the addressability of this memory is 3 bits, and the address space is
4 locations.  We sometimes say: the address space is 2 bits. This is really
shorthand for: we need 2 bits to represent the address, so we have 2^2

How does memory address logic work?

Answer: When we write a value (in this case 3 bits) into one of these
locations, we need to assert (note: "assert" means "set equal to 1" in
this case) the WE bit for the three storage cells that correspond to the
location we wish to write into.  That is, we want the WE signal to cause
the location we want to write into to be a 1 and at the same time we want
the WE signal for all the locations that we do not want to write into to
be a 0.  How do we accomplish that?

Answer: Enter the decoder!  The address of the location we wish to write into
is the two-bit input to the decoder.  The four-bit output contains one 1 and
three 0s.  The 1 corresponds to the address that is input to the decoder, in
this case the address of the location we want to write into.  (If you are not
clear on this, look at Monday's notes or the section on decoders in Chapter 3
of the book.)  We AND the WE signal separately with each of the four outputs
of the decoder, and then apply the four results separately to each of the four
sets of three storage cells.  In that way, if we want to write, WE=1 combined
with the correct address will cause the bits in that location to be written,
and the bits in all the other locations to be left alone.

Question for you: Why will the bits in all the other locations be left alone?

What about reading the contents of a memory location?  Note that the value
stored in each bit is ANDed with one of the outputs of the decoder, and applied
to an OR gate.   Bit[2] of all four locations are input to the same OR gate.
Bit[1] of all four locations are input to the same OR gate.  Same for Bit[0].
Why is that?  If we want to read a value, we want all the bits from one
location.  By ANDing the output of the decoder to each storage cell, followed
by the outputs of all AND gates corresponding to Bit[2] feeding the inputs of
one OR gate, we have formed a mux which selects Bit[2] corresponding to the
address input to the decoder.  Thus the decoder output (address select logic)
is selecting which of the four memory locations to read.

I hope the above helps.  Hope you are having a productive weekend.  See you
in class on Monday.

Yale Patt

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