Department of Electrical and Computer Engineering
The University of Texas at Austin
EE 306, Fall, 2013
Yale Patt, Instructor
TAs:Ben Lin, Mochamad Asri, Ameya Chaudhari, Nikhil Garg, Lauren Guckert,
Jack Koenig, Saijel Mokashi, Sruti Nuthalapati, Sparsh Singhai, Jiajun Wang
August 28, 2013
August 28: Lecture 1. Overview of EE 306.
August 30: Discussion Session. Orientation to the LRC system, tools.
- The computer -- a complex system organized in levels of interpretation.
- The computer -- a universal computational device; given enough time
and space it can do anything any other computational device does.
September 2: Labor Day. University closed. No class.
September 4: Lecture 2: Bits and operations on bits.
September 6: Discussion Session. Emphasis on Chapters 1,2, problem set 1.
- The bit as a unit of information.
- Encoding of bits: Binary numbers (integer data type, ASCII characters.
- Negative numbers, 2's complement representation, sign-extension.
- hex representation of binary numbers.
- Arithmetic operations on numbers. ADD, SUB. [Note that x+x = left shift]
- Logical operations on bits. AND, OR, NOT.
Problem set 1, due before class,
September 9 September 11.
September 9: Lecture 3. Bits and operations on bits (continued).
September 11: Lecture 4. Bits and operations on bits (continued).
September 13: Discussion Session. Emphasis on Chapter 2, problem set 2
September 16: Lecture 5. Basic Logic Structures.
September 18: Lecture 6. Memory and Finite State Machines
- The transistor as a switch
- Basic Gates (AND, OR, NOT)
- Truth table representations
- Any arbitrary function can be built out of these gates
(no attempt at minimization. Just an awareness exercise)
- full ADDER, MUX, DECODER
- Basic storage element (Gated RS latch)
- A register
September 20: Discussion Session. Emphasis on Chapter 3.
- a logic circuit to implement a small piece of memory (perhaps 2**2 x 3)
- concept of memory: address space, addressability
- The notion of state (one of the most important concepts in engineering)
- State diagram, Next State table, State Assignment
- Implementation example: sequential machine
Problem set 2, due before class,
September 23 September 25.
September 23: Lecture 7. Introduction to Von Neumann model.
September 25: Lecture 8. ISA Specification of the LC-3
- the basic structure of the Von Neumann model, showing the basic flow.
- instruction = opcode, operands
- encoding of instructions and data
- instruction cycle (Fetch, Decode, EA, Fetch data, Execute, Store result)
- organization of memory
- address space, addressability revisited (MAR, MDR)
September 27: Discussion Session: Introduction to the LC-3 Simulator and Programming Lab 1.
- instruction formats
- operate, data movement, and control instructions
- LD/ST (also, indirects)
- control (condition codes: N,Z,P)
- The datapath necessary to implement the LC-3
- I/O via the TRAP instruction [Keyboard in, screen out]
September 30: Lecture 9. Introduction to programming in LC-3 machine language.
October 2: Lecture 10. A more sophisticated LC-3 program (cf. Chapters 5,6).
Programming Lab 1 due, 11:59pm, October 3.
- Elements of Problem Solving (stepwise refinement, systematic decomposition, etc.)
- Fundamentals of Debugging (setting breakpoints, single-step, deposit, examine, etc.)
- the control structure of a stored program (sequential, conditional, iteration)
- a detailed example in machine language
- example will use keyboard input, crt output.
- example will include entering data via the keyboard and outputting on the monitor
October 4: Discussion Session: Review for Exam 1.
Problem set 3, due before class, October 7.
October 7: Lecture 11. Review.
October 9: Lecture 12. Exam 1.
October 11: NO Discussion Session. Catch up on sleep, or leave for Dallas!
October 14: Lecture 13. Moving up a level, Assembly Language and the Assembler.
October 16: Lecture 14. Detailed examples in Assembly Language.
October 18: Discussion Session: Emphasis on Chapter 7 and Programming Lab 2.
- going from higher to lower level: interpretation vs. translation
- translation: what do assemblers and compilers do?
- hand assemble programs from earlier lectures.
- revisiting the character count problem
Programming Lab 2 due, 11:59pm, October 20.
October 21: Lecture 15. Programming in Assembly Language with Data Structures I
October 23: Lecture 16. Programming in Assembly Language with Data Structures II
October 25: Discussion Session: Emphasis on Problem set 4
Problem set 4, due before class, October 28.
October 28: Lecture 17. Physical I/O.
October 30: Lecture 18. Physical I/O, continued.
- asynchronous activity
- memory mapped vs. special I/O instructions
- program control vs. device (interrupt) driven
- device registers (KBDR, KBSR, DDR, DSR)
- Synchronization via the ready bit.
- interrupt enable bit
- I/O Service Routines
November 1: Discussion Session: Emphasis on Programming Lab 3
Programming Lab 3 due, 11:59pm, November 3.
November 4: Lecture 19. The TRAP instruction.
November 6: Lecture 20. Subroutines (JSR/RET mechanism)
November 8: Discussion Session: Chapter 8,9. Prepare for Exam 2.
- saving/restoring state
- success/failure mechanisms
Problem set 5, due before class, November 11.
November 11: Lecture 21. Review or catch up.
November 13: Lecture 22. Exam 2.
November 15: Discussion Session: Deep breath: General review.
November 18: Lecture 23. Stacks. Parameters. How are they passed?
November 20: Lecture 24. Interrupt processing
November 22: Discussion Session: Programming Labs 4,5.
Programming Lab 4 due, 11:59pm,
November 24 November 27.
November 25: Lecture 25. The Calculator Example (pulling a lot together).
November 27: Lecture 26. Special lecture -- to be announced.
- ASCII/2's-complement conversion
- Stack arithmetic
November 28,29: Thanksgiving Day recess. Enjoy the holiday.
December 2: Lecture 27. Pot pourri
December 4: Lecture 28. Any OTHER questions!
- Parallelism. The latest hot button!
- Preview of coming attractions: The ARM ISA
December 6: Discussion Session: Last discussion session before final exam.
Programming Lab 5 due, December 6, 5pm.
Problem set 6, not to be handed in, use for final exam preparation.
December 13. Final Exam, 7 to 10pm. (according to the Registrar's Course Schedule, which he can change.)
- 1st programming Lab (machine language) -- Due: October 3, 11:59pm.
- 2nd programming Lab (assembly language) -- Due: October 20, 11:59pm.
- 3rd programming Lab (assembly language) -- Due: November 3, 11:59pm.
- 4th programming Lab (assembly language) -- Due: November 24, 11:59pm.
- 5th programming Lab (assembly language) -- Due: December 6, 5pm.
- 1st problem set, (emphasis on Chapters 1,2). Due: just before class, September 9.
- 2nd problem set, (emphasis on Chapter 2,3). Due: just before class, September 23.
- 3rd problem set, (emphasis on Chapter 4,5). Due: just before class, October 7. (Note: exam on October 9)
- 4th problem set, (emphasis on Chapter 7). Due: just before class, October 28.
- 5th problem set, (emphasis on Chapters 8,9). Due: just before class, November 11. (Note: exam on November 13)
- 6th problem set, (emphasis on Chapter 10). Not to turn in.