Tue, 2 Apr 2013, 21:35

A student writes:
 
> Dr. Patt,
> 
> I was hoping for a clarification on lab 4.  When you explain the difference
> between an interrupt and an exception, you state that "the
> exception-causing instruction should not be allowed to complete before the
> exception is handled."
> 
> ...
>
> I hope that makes sense!  Thanks for the clarification!
> 
> <<name withheld to protect the student who is hoping for clarification>>


I decided to delete the rest of his message since I think it would only add 
to the confusion.  Since there may be others who are confused, let me try
again:

First, interrupts are almost always handled when convenient and that usually
means at the start of each instruction: a test to see if an interrupt is
present, and if so, we microbranch to the appropriate microinstruction that
initates the interrupt instead of processing the current instruction.

Exceptions on the other hand almost always get handled as soon as they are 
detected.  That means taking a microbranch as soon as the machine discovers
that an exceptional event has happened.  The microbranch is to the 
microinstruction that initates the exception.  If there is no exception, then
the microbranch just continues processing the instruction.

Recall in class the state machine I scribbled (now on blackboard) where
I pointed to various states that could have a microbranch in them, one path
for business as usual and one path if the exception or interrupt is to be
dealt with.  Go back over my in-class notes.  Can you find that state machine
I am talking about?  If not, please go to a TA's office hour.  If yes, do you
see the states containing those microbranches?  For each state, do you see
what event (interrupt or exception) would cause the machine to microbranch 
to the start of the initiation sequence, rather than continue business as 
usual?

Now, let's look at the state machine.  We begin the instruction cycle (Fetch,
Decode, etc.) in state 18 by loading the MAR and incrementing the  PC by 2.
Then we unconditionally jump to which state?  ...and we continue to process 
the instruction until we are done with it, and then go to state 18 to process
the next instruction.

QUESTION: For each exception, in which state do we know that that exception
has happened.  We put a two-way branch in that state.  One way if it is 
business as usual, the other way if we need to initiate the exception.  
We may need to add some functionally to the data path to discover that 
exception.

QUESTION: Do we need to add a two-way branch in order to discover an illegal
opcode, or can we make use of the existing structures?  That is, will an
illegal opcode already take the machine to a state which knows that there
is an illegal opcode being processed, AND can start the initiation process
from that state?

I hope the above helps.  I realize I have not given you the answer.  Hopefully
I have given you enough questions that you can come up with the answer by
yourself.

Good luck finishing this lab on time.

Yale Patt