Department of Electrical and Computer Engineering

The University of Texas at Austin

EE 460N, Spring 2013
Problem Set 1
Due: January 28, before class
Yale N. Patt, Instructor
Faruk Guvenilir, Sumedha Bhangale, Stephen Pruett, TAs


You are encouraged to work on the problem set in groups and turn in one problem set for the entire group. Remember to put all your names on the solution sheet. Also remember to put the name of the TA in whose discussion section you would like the problem set turned back to you.

You will need to refer to the assembly language handouts and the LC-3b ISA on the course website.


  1. Briefly explain the difference between the microarchitecture level and the ISA level in the transformation hierarchy. What information does the compiler need to know about the microarchitecture of the machine in order to compile the program correctly?

    Classify the following attributes of LC-3b as either a property of its microarchitecture or ISA:

    1. There is no subtract instruction in LC-3b.
    2. The ALU of LC-3b does not have a subtract unit.
    3. LC-3b has three condition code bits (n, z, and p).
    4. The n, z, and p bits are stored in three 1-bit registers.
    5. A 5-bit immediate can be specified in an ADD instruction
    6. It takes n cycles to execute an ADD instruction.
    7. There are 8 general purpose registers used by operate, data movement and control instructions.
    8. The registers MDR (Memory Data Register) and MAR (Memory Address Register) are used for Loads and Stores.
    9. A 2-to-1 mux feeds one of the inputs to ALU.
    10. The register file has one input and two output ports.
  2. Both of the following programs cause the value x0004 to be stored in location x3000, but they do so at different times. Explain the difference.

    1. First program:
            .ORIG x3000
            .FILL x0004
    2. Second program:
            .ORIG x4000
            AND R0, R0, #0
            ADD R0, R0, #4
            LEA R1, A
            LDW R1, R1, #0
            STW R0, R1, #0
      A     .FILL x3000	
  3. Classify the LC-3b instructions into Operate, Data Movement, or Control instructions.

  4. At location x3E00, we would like to put an instruction that does nothing. Many ISAs actually have an opcode devoted to doing nothing. It is usually called NOP, for NO OPERATION. The instruction is fetched, decoded, and executed. The execution phase is to do nothing! Which of the following three instructions could be used for NOP and have the program still work correctly?

    1. 0001 001 001 1 00000
    2. 0000 111 000000000
    3. 0000 000 000000000

    For each of the three that can not be used for NOP, explain why.

  5. Consider the following possibilities for saving the return address of a subroutine:

    1. In a processor register.
    2. In a memory location associated with the subroutine; i.e., a different memory location is used for each different subroutine.
    3. On a stack.

    Which of these possibilities supports subroutine nesting, and which supports subroutine recursion (that is, a subroutine that calls itself)?

  6. A small section of byte-addressable memory is given below:

    Address Data
    x0FFE xA2
    x0FFF x25
    x1000 x0E
    x1001 x1A
    x1002 x11
    x1003 x0C
    x1004 x0B
    x1005 x0A

    Add the 16-bit two's complement numbers specified by addresses x1000 and x1002 if

    1. the ISA specifies a little-endian format
    2. the ISA specifies a big-endian format
  7. Say we have 32 megabytes of storage, calculate the number of bits required to address a location if

    1. the ISA is bit-addressable
    2. the ISA is byte-addressable
    3. the ISA is 128-bit addressable
  8. A zero-address machine is a stack-based machine where all operations are done using values stored on the operand stack. For this problem, you may assume that its ISA allows the following operations:

    Note: To compute A - B with a stack machine, the following sequence of operations are necessary: PUSH A, PUSH B, SUB. After execution of SUB, A and B would no longer be on the stack, but the value A-B would be at the top of the stack.

    A one-address machine uses an accumulator in order to perform computations. For this problem, you may assume that its ISA allows the following operations:

    A two-address machine takes two sources, performs an operation on these sources and stores the result back into one of the sources. For this problem, you may assume that its ISA allows the following operation:

    Note 1: OP can be ADD, SUB or MUL for the purposes of this problem.

    Note 2: A, B, C, D, E and X refer to memory locations and can be also used to store temporary results.

    1. Write the assembly language code for calculating the expression (do not simplify the expression):

      X = (A + (B × C)) × (D - (E + (D × C)))
      1. In a zero-address machine
      2. In a one-address machine
      3. In a two-address machine
      4. In a three-address machine like the LC-3b, but which can do memory to memory operations and also has a MUL instruction.
    2. Give an advantage and a disadvantage of a one-address machine versus a zero-address machine.

  9. The following table gives the format of the instructions for the LC-1b computer that has 8 opcodes.

    ADD 000DRASR
    AND 001DRASR
    BR(R)010NZ PTR
    LDImm011signed immediate
    LEA 100signed offset
    LD 101DR0TR
    ST 110SR0TR
    NOT 111DR000


    1. What kind of machine (n-address) does the above ISA specification represent?
    2. How many general purpose registers does the machine have?
    3. Using the above instructions, write the assembly code to implement a register to register mov operation.
    4. How can we make a PC-relative branch? (HINT: You will need more than one LC-1b instruction)
  10. Consider the following LC-3b assembly language program:

            .ORIG x3000
    	AND R5, R5, #0
    	AND R3, R3, #0
    	ADD R3, R3, #8
    	LEA R0, B
    	LDW R1, R0, #1
    	LDW R1, R1, #0
    	ADD R2, R1, #0
    AGAIN	ADD R2, R2, R2
    	ADD R3, R3, #-1
    	BRp AGAIN
    	LDW R4, R0, #0
    	AND R1, R1, R4
    	NOT R1, R1
    	ADD R1, R1, #1
    	ADD R2, R2, R1
    	BRnp NO
    	ADD R5, R5, #1
    B	.FILL XFF00
    A	.FILL X4000
    1. The assembler creates a symbol table after the first pass. Show the contents of this symbol table.

    2. What does this program do? (in less than 25 words)

    3. When the programmer wrote this program, he/she did not take full advantage of the instructions provided by the LC-3b ISA. Therefore the program executes too many unnecessary instructions. Show what the programmer should have done to reduce the number of instructions executed by this program.

  11. Consider the following LC-3b assembly language program.

            .ORIG	x4000
    MAIN	LEA	R2,L0
    	JSRR	R2
    	JSR	L1
    L0	ADD	R0,R0,#5
    L1	ADD	R1,R1,#5
    1. Assemble the above program. Show the LC-3b machine code for each instruction in the program as a hexadecimal number.

    2. This program shows two ways to call a subroutine. One requires two instructions: LEA and JSRR. The second requires only one instruction: JSR. Both ways work correctly in this example. Is it ever necessary to use JSRR? If so, in what situation?

  12. Consider the following two LC-3b assembly language programs.

          .ORIG x4000            .ORIG x5000
    MAIN1 LEA   R3,L1      MAIN2 LEA   R3,L2
    A1    JSRR  R3         A2    JMP   R3
          HALT                   HALT
          ;                      ;
    L1    ADD   R2,R1,R0   L2    ADD   R2,R1,R0
          RET                    RET

    Is there a difference in the result of executing these two programs? If so, what/why is there a difference? Could a change be made (other than to the instructions at Labels A1/A2) to either of these programs to ensure the result is the same?

  13. Use one of the unused opcodes in the LC-3b ISA to implement a conditionally executed ADD instruction. Show the format of the 16 bit instruction and discuss your reasoning assuming that:

    1. The instruction doesn't require a steering bit. (The ADD is a register-register operation).

    2. The instruction requires a steering bit. (The ADD has both register-register and register-immediate forms).

  14. Discuss the tradeoffs between a variable instruction length ISA and a fixed instruction length ISA. How do variable length instructions affect the hardware? What about the software?

  15. Please go to the handouts section of the course web site, print and fill out the student information sheet, and turn it in with a recognizable recent photo of yourself on January 28th (the same day this problem set is due).