F: Fetch stage D: Decode stage A: AGEX stage M: Memory stage S: SR stage Cycle Instruction 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 -------------------------------------------------------------- AND R0, R0, #0 F F D A M S BRz TEN F D D D D A M S ADD R0, R0, #10 F D A M S HALT F D A M S