Sun, 8th Nov 2015, 20:04 Re: Fw: Re: EE306 Question

A student writes:

> I’m ******** and I’m one of the students in your discussion section
> for EE 306. I have a brief question about something on the book that
> doesn’t make sense to me.
> At the top of the book page 204, it describes the EXECUTE phase of the
> load instruction. But from what I know, the LD instruction, as well as
> LDR and LDI, has no EXECUTE phase because there is nothing that needs
> the operation of ALU. Aren’t the steps described on the book for
> FETCH OPERANDS phase? The same thing is said on page 206 when talking
> about the memory-mapped output. 
> I am really confused here. Can you explain this to me? Thanks!
> Best Regards,
> <<name withheld to protect the student who is reading the book carefully>>

I debated whether to share my answer to this student with the whole class, but
decided to do so because I do not want you overly concerned about what happens
in each phase of an instruction cycle.  In fact, there are some cases where
one could argue whether an operation is part of one phase or another.  And,
as you know, most instructions do not require all six phases.  As you prepare
for the exam, I want you to not waste time agonizing over which phase
of the instruction cycle a particular operation is part of.  If I ask you
anything about these phases, it will be very clearly unambiguous to you what
the right answer is.

With respect to the student's question about pages 204 and 206, he is
absolutely right.  The use of the term "EXECUTE phase" is incorrect.  What
the book should have said is: "the data path required to execute the load
instruction.  And to add to the confusion, the word "execute" (as opposed to
"EXECUTE phase") is generally used to refer to all that needs to be done to
carry out the work of an instruction AFTER the instruction has been decoded.
In the case of LD, LDR, LDI that means evaluating the address, fetching the
operand and storing the result in a destination register.  In the case of
ADD, AND, NOT, that means sourcing what is needed by the ALU, performing the
operation add, and, or not, and storing the result into the destination

Hope the above saves you some agony about the dividing lines between phases
of some of the instructions.  Since computer designers often disagree about
this, I am not about to ask you on an exam.

Good luck with the problem set and midterm 2.

Yale Patt