Thu, 26 Mar 2015, 13:39

A student writes:

> Dear Professor Patt,
> I have a doubt in the arbitration scheme's state machine. When in SACK
> state and BBSY_ IN is negated the master takes control of the bus and
> asserts BBSY_OUT till the transaction is complete. Once complete it negates
> the BBSY_OUT to indicate that now the bus is free. But there is no state
> where the BBSY_OUT is negated. Shouldn't there be another state after the
> transaction is complete in which BBSY_OUT is negated before going to the
> IDLE state?
> Thanks.
> <>

Thank you for the question. The Moore state machine I put on the white board
yesterday is the standard model, which associates asserted outputs with the
state one is in.  Thus,if the entry inside the state says BBSY_OUT, this
means BBSY_OUT is asserted.  If the entry does not include BBSY_OUT, this 
means BBSY_OUT is NOT asserted, i.e., negated.  I suppose we could include
all the signals that are not asserted, but that would add enormous clutter
and distraction, so we don't.  

When the device controller goes from the last state of the transaction to 
IDLE, the fact that it is in IDLE means BBSY_OUT is not asserted, i.e., 
negated.  OK?

Good luck with the rest of the course.  I will see you on Monday.

Yale Patt