Wed, 26 Apr 2017, 01:58


Vivian,

Since you say you sent this to the entire class, I will cc the entire 
class with my response since it will give me a chance to talk about 
Problem 1 which I was particular disappointed with.  A substantial number
of students got each of the four parts to problem 1 correct.  What was
disappointing was that not many got more than two of them.

Thank you for the feedback.  See in-line for the detailed comments.

On Tue, Apr 25, 2017 at 01:35:37PM -0500, Vivian Tan wrote:
> Hi Dr. Patt,
> 
> I don't know if you got this email, since I sent it to the entire class
> accidentally instead.
> 
> Best,
> Vivian
> - Forwarded message -
> From: Vivian Tan
> Date: Tue, Apr 25, 2017 at 12:21 AM
> Subject: Re: [s17.460n] the 2nd midterm
> To: s17.460n@utlists.utexas.edu
> 
> 
> Hi Dr. Patt,
> 
> I'm not sure if I can provide any useful insights, but I will share my
> reasons/thoughts for problem 1:
> 
>    - Part a: I totally misunderstood the relationship between pipeline
>    stages and the vector length register. For some reason, I thought that each
>    pipeline stage would hold one vector instruction that was 38 normal
>    instructions (like add, ld, etc) long. I thought I understood the concept
>    of vector chaining, but I was initially confused when there was no mention
>    of the lengths of individual normal instructions, which probably should
>    have been a hint that I was thinking about the problem incorrectly.

I actually did this on the white board, showing what happens without vector
chaining and with vector chaining.  Without vector chaining, the machine has
to wait for all 38 elements to finish before the second instruction can start.
With vector chaining, the second instruction can start as soon as the first
element of the first instruction finishes.  Therefore, it does not have to
wait the additional 37 cycles.  Therefore: 37 cycles saved.  Many students
drew the figure on their paper, replacing the generic numbers with the
numbers specified in the problem, and 20 seconds later were able to write
down the correct answer!

>    - Part b: I thought what I wrote here was similar to what the TA said
>    was the answer in discussion, so I'm not sure why I didn't get any points
>    for this part. Maybe it was because I did not mention that the likelihood
>    of rounding up/down is the same? This is what I wrote:
>       -  "Unbiased in this case means that the number is simply rounded to
>       the next nearest value with no other considerations. Unbiased is
> reasonable
>       because this means the number can be rounded up or down,
> depending only on
>       its value."

I HOPE the TA did not tell you that.  I will talk to my TAs!  The unbiased
refers EXACTLY to the case in nearest rounding when you are halfway between
the two values.  You round to the value that ends in a 0.  So, approximately
half the time up, half the time down.  If you are not exactly halfway, you
round to nearest which is sometimes up and sometimes down.  But the term
unbiased means, as I showed you on the whiteboard what happens in those cases
where there is no "nearest" since you are halfway.

>    - Part c: I didn't study the Task State Segment very closely (not a good
>    reason). I studied segmentation, which I thought may have been similar to
>    the TSS, but that was incorrect.

I showed you what a TSS looks like and pointed out some of the things that
are present.  And then told you that the operating system uses it to save
context and load context.  The TSS contains all the state of the process that
needs to be saved on a context switch.  Things like PC, PSR, registers, base
registers of the page tables, etc.

>    - Part d: I didn't study sector caches (not a good reason). I mostly
>    focused on understanding how a cache works, how to implement the different
>    types of caches, and the tradeoffs between them.
 
I agree that I did not spend much time on sector caches.  It was a bullet on
the handout, so I pointed to it and told you what a sector cache is and why
we need separate valid bits for each sector.  And gave you the good example
of allocating on a write miss when I am pushing values onto the stack in
preparation for a procedure call.  No need to load the cache line before
doing the store since I am going to successively clobber the values in the
line as I push the activation record (aka stack frame) onto the stack.

Anyhow, now you know, and are ready to move on to other things.

> Overall, I think the overarching concepts behind most of the test questions
> were understandable, but some of the questions like question 5 didn't leave
> a lot of room for partial credit. 

You are right about that.  I actually felt that you all would get mostly
full credit for it.

For problem 3, I think descriptions for
> the DMA and MEM signals would have been helpful, but then maybe that might
> have made the question too easy?
 
That was indeed my concern and I thought you would be able to figure out
how to use them without me spelling it out.

> I was hoping to do better on this exam than on the first but am
> disappointed in myself, since I did worse. I think you are doing well
> teaching the basic concepts/ideas of the course, but I personally have to
> do a lot of work to try and build up those basics to even begin to answer
> more complex questions on the homework and on the old exams (which is to be
> expected for a student like me). Even though my grades don't reflect it, I
> am learning a lot in your class, but I think the most I can hope for is to
> just pass it. I'll keep working at it, those are just my thoughts so far.
 
Again, thanks for your email.  Please do not beat yourself up on this.  You
can do better than just pass this course.  You still have the labs and the
final to do.  Good luck with it.

Yale Patt


> Regards,
> Vivian Tan
> 
> On Mon, Apr 24, 2017 at 9:10 PM, Yale N. Patt  wrote:
> 
> > I am sending this email, specifically because I did not think of making an
> > announcement about the grades until well after we started handing back
> > exams.
> > AND, I should have told you all this before handing out exams.
> >
> > You should know the following to put your exam score in perspecive.  Lowest
> > grade on the exam was a 1, highest was 96.  Median, however was 37, which
> > is
> > a lot lower than I expected.  Even the first problem where you were asked
> > to
> > provide answers to 4 sub-problems was difficult for too many students, and
> > I do not know why.  So, please feel free to tell me why you were not able
> > to get at least 15 out of 20 points
> >
> > Obviously, I was disappointed in the grades on the exam, and would like to
> > understand the reasons for it.  I did not think the exam was that hard, and
> > yet, the grades were not good.  If you have any insights, please share them
> > with me.
> >
> > Also, please work the problems in your spare time between now and the final
> > exam, and see one of my TAs for help if you are not able to.  ...or come by
> > my office or send me email.  I would like to see you all do well in the
> > course.  ...and that is still possible on the rest of the work of the
> > course.
> >
> > Good luck.
> > Yale Patt
> >
> >