Sample Code for the V-Way Cache
Platforms supported: Unix, Linux


Downloading: 

To  execute the sample code for the v-way cache, download the following files:

  1. vway_cache.h -> The header file for the v-way cache
  2. vway_cache.c -> The source file for the v-way cache
  3. cachesim.c -> A cache simulator that contains the trace reader
  4. Makefile -> A sample makefile
  5. vortex_00.atr.gz -> A trace file containing the L2 access stream (WARNING: The trace file is 30MB in size)

Compiling:

After saving these files in a directory, compile the code by typing "make". This should produce the executable cachesim.
Type ./cachesim -h to get info on how to run cachesim.


Sample runs:

For testing cachesim, type "make test".  This should simulate four cache configurations:

1.   The baseline 256KB 8-way cache
./cachesim vortex_00.atr.gz

===================
Printing results:
===================
Count : 34619699
Miss : 3701376 (10.69%)
G-Repl : 0.00%
===================

2.   A 256kB V-way cache with REUSE replacement
./cachesim -tdr 2 -datarepl REUSE vortex_00.atr.gz

===================
Printing results:
===================
Count : 34619699
Miss : 2460295 (7.11%)
G-Repl : 94.94%
===================

3.  A 256kB V-way cache with LRU replacement
./cachesim -tdr 2 -datarepl LRU vortex_00.atr.gz

===================
Printing results:
===================
Count : 34619699
Miss : 2941702 (8.50%)
G-Repl : 93.86%
===================

4.    A 256kB V-way cache with RANDOM replacement
./cachesim -tdr 2 -datarepl RAND vortex_00.atr.gz

===================
Printing results:
===================
Count : 34619699
Miss : 4342952 (12.54%)
G-Repl : 97.16%
===================

Generating the trace file:

The trace for the vortex benchmark was obtained by skipping 15B instructions and simulating 2B instructions. The first-level I and D caches were 16kB, 2-way with 64B linesize. The trace.atr file contains line-address for the lines that missed the first level cache.  Each trace entry is stored in the trace file as four consecutive bytes. The trace.atr file was compressed using gzip. The resulting trace.atr.gz file is the input to cachesim.


Disclaimer:

Standard open source policies apply. In addition to the usual yada-yada, note that this code is written for simplicity. It does not contain every gory detail and performance optimization used in the original design.  However, this should have only a negligible effect on the miss-rate.

Please feel free to email me if you have any questions, comments, suggestions, or feedback.


This document was generated by Moinuddin on June, 12 2005 using texi2html