; Chapter 7 9S12C32 assembly language programs
; Jonathan W. Valvano, 2/07/07
; This software accompanies the book,
; Embedded Microcomputer Systems: Real Time Interfacing, Second Edition
; published by Thomson Engineering, 2006
;


;MC9S12C32, 4MHz
SCI_Init jsr RxFifo_Init ;FIFO is empty
       jsr  TxFifo_Init  ;FIFO is empty
       movb #$2c,SCICR2  ;arm just RDRF
       movw #26,SCIBD    ;baud rate=9600
       cli
       rts


; Inputs: none Outputs: RegA is ASCII
SCI_InChar pshb
iloop  jsr  RxFifo_Get  ;B=0 if empty
       tbeq B,iloop
       pulb
       rts              ;A=character

; Inputs: RegA is ASCII Outputs: none
SCI_OutCh pshb          ;A=character
oloop  jsr  TxFifo_Put  ;save in FIFO
       tbeq B,oloop     ;B=0 if full
       movb #$AC,SCICR2 ;arm TDRE
       pulb
       rts


SCIhandler ldaa SCISR1
       bita #$20 
       beq  CkTDRE   ;Not RDRF set
       ldaa SCIDRL   ;ASCII character 
       bsr  RxFifo_Put
CkTDRE ldaa SCISR1
       bpl  sdone    ;Not TDRE set
       ldaa SCICR2   ;bit 7 is TIE
       bpl  sdone    ;disarmed?
       bsr  TxFifo_Get
       tbeq B,nomore
       staa SCIDRL  ;start output
       bra  sdone
nomore movb #$2C,SCICR2 ;disarm TDRE
sdone  rti


       org  $FFD6
       fdb  SCIhandler 
;Program 7.1. Assembly language implementation of an interrupting SCI interface.






; Program 7.1. Assembly subroutine to output a character using the SCI port.
; MC68HC812A4
OutChar brclr SC0SR1,#$80,OutChar
        staa  SC0DRL ;sci data
        rts

; Program 7.2. A second assembly subroutine to output a character using the SCI port.
; MC68HC812A4
OutChar staa SC0DRL ;sci data
wait2   brclr SC0SR1,#$80,wait2
        rts

; Program 7.3. A third assembly subroutine to output a character using the SCI port.
; MC68HC812A4
OutChar staa SC0DRL ;sci data
wait3   brclr SC0SR1,#$40,wait3
        rts

; Program 7.5. Assembly ritual to initialize the SCI port to accept receiver interrupts.
; MC68HC812A4 and MC68HC912B32
RITSCI sei       ;make atomic
       ldd  #104 ;4800 baud
       std  SC0BD
       ldaa #00  ;M=0, 8 bit data
       staa SC0CR1 ;1 stop
       ldaa #$2C 
       staa SC0CR2
       bsr  CLRQ ;Initialize FIFO
       cli       ;Enable
       rts

; Program 7.6. Simple polling for receiver interrupts.
; MC68HC812A4 and MC68HC912B32
SCIHAN  brset SC0SR1,#$20,INSCI

; Program 7.7. Polling for ones and zeros for receiver interrupts.
; none for MC68HC812A4 and MC68HC912B32

; Program 7.8. Assembly ISR for receiver interrupts.
; MC68HC812A4 and MC68HC912B32
INSCI ldaa SC0SR1 ;status  
      anda #$0E ;OR, NF, FE  
      bne  ERROR   
      ldaa SCDR ;data, ack  
      bsr  PutFifo ;Communicate  
      bcs  ERROR ;FIFO full?  
      rti

; Program 7.10. Assembly ritual to initialize the SCI port to accept receiver and transmitter interrupts.
; MC68HC812A4/MC68HC912B32
Init  movw #104,SC0BD  ;9600
      movb #$00,SC0CR1 ;mode
      movb #$2c,SC0CR2 ;RDRF
      jsr  RxInitFifo  ;empty
      jsr  TxInitFifo  ;empty
      cli
      rts

Program 7.11. Assembly subroutines called by the main program to perform serial I/O.
; MC68HC812A4/MC68HC912B32
InChar  jsr  RxGetFifo
        beq  InChar
        rts
OutChar jsr  TxPutFifo ;save
        beq  OutChar  ;full?
        movb #$AC,SC0CR2 ;arm
        rts

; Program 7.12. Assembly ISR for receiver and transmitter interrupts.
; MC68HC812A4/MC68HC912B32
SCIhdlr ldaa SC0SR1
        anda #$20    ;check RDRF
        beq  ChkTDRE ;Not RDRF 
InSCI   ldaa SC0DRL  ;ASCII code
        bsr  RxPutFifo
ChkTDRE ldaa SC0SR1
        anda #$80    ;check TDRE
        beq  SCIdone ;Not TDRE
OutSCI  bsr  TxGetFifo
        beq  nomore
        staa SC0DRL   ;start next 
        bra  SCIdone
nomore  movb #$2C,SC0CR2 ;disarm
SCIdone rti


; Program 7.13. Assembly functions for serial output using DTR synchronization.
; MC68HC812A4 or MC68HC912B32
;PT3/IC3 is DTR
OutChar brclr PORTT,#$08,OutChar
        brclr SC0SR1,#$80,OutChar
        staa SC0DRL ;sci data
        rts