// Chapter 9 6812 C programs
// Jonathan W. Valvano, 2/26/07
// This software accompanies the book,
// Embedded Microcomputer Systems: Real Time Interfacing, Second Edition
// published by Thomson Engineering, 2006

//Program 9.1. MC9S12C32 code to change the E clock from 8 to 25 MHz.
void PLL_Init(void){  
  CLKSEL = 0x00;                // make sure PLL is deselected
  SYNR = 24;  REFDV = 7;        // PLLCLK=2*OSCCLK*(SYNR+1)/(REFDV+1)
  PLLCTL = 0xD1;                // Turn on PLL
  while((CRGFLG&0x08) == 0){}   // Wait for PLLCLK to stabilize.
  CLKSEL |= 0x80;               // Switch to PLL clock
}

// Program 9.2. Software to configure the chip select for the external PROM.
void PROMinit(void){
	CSSTR0 = (CSSTR0&0xF3)|0x08; // 2 cycle stretch on CSP0
}

// Program 9.3. Software to configure the chip select for the external RAM.
void RAMinit(void){
	MODE = 0x3B			        // special expanded narrow mode
	PEAR = 0x2C;		      	// enable E, R/W, LSTRB(not needed)
	WINDEF = WINDEF&0x7F;		// disable DPAGE
	CSCTL0 = CSCTL0|0x10;		// enable CSD
	CSCTL1 = CSCTL1|0x10;		// CSD $0000 to $7FFF
	CSSTR0 = (CSSTR0&0xFC)|0x01;	// 1 cycle stretch on CSD
}


//Program 9.4. Software to configure the MC9S12C32 for the external RAM.
void RAM_Init(void){
  MODE = 0xA0;                // normal expanded narrow mode
  MISC = (MISC&0xF3)|0x04;    // 1-cycle stretch on external
  PEAR = 0x0C;                // enable E, R/W, LSTRB(not needed)
}


// Program 9.5. Software to configure the chip select for the external PROM.
void PROMinit(void){
	CSSTR0 = (CSSTR0&0xF3)|0x04; // 1 cycle stretch on CSP0
}


//  Program 9.6. Software to configure the chip select for the external RAM.
void RAMinit(void){
	MODE = 0x7B		        	// special expanded wide mode
	PEAR = 0x2C;			      // enable E, R/W, LSTRB
	WINDEF = WINDEF&0x7F;		// disable DPAGE
	CSCTL0 = CSCTL0|0x10;		// enable CSD
	CSCTL1 = CSCTL1|0x10;		// CSD $0000 to $7FFF
	CSSTR0 = (CSSTR0&0xFC)|0x01;	// 1 cycle stretch on CSD
}


// Program 9.7. Software to configure the mode for the external RAM.
void RAM_Init(void){
  MODE = 0xE0;                // normal expanded wide mode
  MISC = (MISC&0xF3)|0x04;    // 1-cycle stretch on external
  PEAR = 0x0C;                // enable E, R/W, LSTRB
}


//  Program 9.8. Software to configure the mode for the extended RAM.
void RAMinit(void){
	MODE = 0x7B			        // special expanded wide mode
	PEAR = 0x2C;			      // enable E, R/W, LSTRB
	WINDEF = WINDEF|0x80;		// enable DPAGE
	MXAR = 0x03;		      	// enable A17, A16 on Port G
	CSCTL0 = CSCTL0|0x10;		// enable CSD
	CSCTL1 = CSCTL1&0xEF;		// CSD $7000 to $7FFF
	CSSTR0 = (CSSTR0&0xFC)|0x01;	// 1 cycle stretch on CSD
}

//  Program 9.9. Method for accessing extended RAM.
struct addr20
{   unsigned char msb;      // bits 19-12, only 17-12 used in this interface
    unsigned short lsw;     // bits 11-0
};
typedef struct addr20 addr20Type;
char ReadMem(addr20Type addr){ char *pt;
	DPAGE = addr.msb;		          	// set address bits 19-12, only 17-12 used
	pt = (char *)(0x7000+addr.lsw);	// set address bits 11-0
	return *pt;		                 	// read access
}
void WriteMem(addr20Type addr, char data){ char *pt;
	DPAGE = addr.msb;			          // set address bits 19-12, only 17-12 used
	pt = (char *)(0x7000+addr.lsw);	// set address bits 11-0
	*pt = data;				              // write access
}


//  Program 9.10. Software to configure the mode for the extended PROM.
void PROMinit(void){
	MODE = 0x7B		        	// special expanded wide mode
	PEAR = 0x2C;			      // enable E, R/W, LSTRB (none needed)
	WINDEF = WINDEF|0x40;		// enable PPAGE
	MXAR = 0x01F;		      	// enable A20-A16 on Port G
	CSSTR0 = (CSSTR0&0xF3)|0x04;	// 1 cycle stretch on CSP0
}

//  Program 9.11. Method for accessing extended PROM.
struct addr22
{   unsigned char msb;    // bits 21-14, only 20-14 used in this interface
    unsigned short lsw;   // bits 13-0
};
typedef struct addr22 addr22Type;
char ReadPROM(addr22Type addr){ char *pt;
	PPAGE = addr.msb;		          	// set address bits 21-14
	pt = (char *)(0x8000+addr.lsw);	// set address bits 13-0
	return *pt;				              // read access
}