Fall 2006 EE345M Announcements

Announcements, 8/28/06
Great TAs:
        Anil Kottam, kottam@mail.utexas.edu (HEAD TA)
        John Porterfield, John.Porterfield@mail.utexas.edu
        Hyunjin Shin. ulexis99@mail.utexas.edu
Office Hours: Monday 11:30-12:15pm, Wednesday 2:15-3pm, Friday 11:15-12noon
When is the first lab period? Go to your assigned lab the week of 9/12
   meet your TA
   see the demonstration
   find a Lab partner
When is the first assignment due?
   Preparation for Lab25b due the week of 9/18
Where are the Metrowerks starter programs?
   At the bottom of the web page at http://www.ece.utexas.edu/~valvano/metrowerks/
Where are the data sheets for the 9S12C32?
   Download the 9S12C32_ZIP file.
What to do if you have no partner?
   Do the Lab 25b prep yourself and let your TA know.
When are the quizzes and final?
    15% In class Quiz1, Wednesday October 4, 1-1:50pm, in regular class room
    15% In class Quiz2, Wednesday November 8, 1-1:50pm, in regular class room
    30% Final, Monday December 18, 9am-12n, regularly scheduled
Lecture Notes http://www.ece.utexas.edu/~valvano/EE345M/
Lab Manual: posted at http://www.ece.utexas.edu/~valvano/EE345MLab/
Reference materials: Data sheets for most of the devices used in this class are available as pdf files on the website.
http://www.ece.utexas.edu/~valvano/Datasheets Data sheets for devices used in EE345L and EE345M
http://www.ece.utexas.edu/~valvano/Starterfiles Starter files for EE345L and EE345M
http://www.ece.utexas.edu/~valvano/metrowerks/ Description of Starter programs
http://www.ece.utexas.edu/~valvano/Datasheets/MC9S12C128_V1.pdf 9S12C32 data sheet
http://www.ece.utexas.edu/~valvano/embed/toc1.htm C programming manual
http://www.ece.utexas.edu/~valvano/Starterfiles/TechArts.zip Data sheets about board
Old Exams http://www.ece.utexas.edu/~valvano/EE345Moldquiz/
Other references: For programming in C, see the EE312C text or
      Also see http://www.ece.utexas.edu/~valvano/embed/toc1.htm

How to buy 9S12C32
How to test the 9S12C32 board
Handling instructions for the 9S12C32 board
How to download Metrowerks
Clarification of Software Style
Interrupt Vectors
SPI mode selection and timing

There are CDs at Lab checkout that you can borrow for the evening that include Metrowerks, ExpressPCB, and TExaS installers. Make sure you get TExaS version 1.28.

We will be using Metrowerks+TechArts 9S12C32
Cost is $50 (each student will be given one)
Can program/download/debug at home
includes cable, programmer/debugger, power supply
MC9S12C32 single chip only (no address/data bus)
32K ROM (compiler is free up to 12K)
2K RAM
24 I/O pins (but enough for EE345L and EE345M)
10-bit ADC
For more information see
http://www.ece.utexas.edu/~valvano/EE345M/Howtobuild_S12C32.pdf
The specific part to buy is ORDER CODE: NC12C32SP-SB $49.95 at http://www.technologicalarts.com/ If you have purchased a 9S12C32 kit without the SB connector, come see me. I ordered some SB connectors and you can decide for yourself how you want to handle the hardware connections.

This one way to interface EE345M labs on 9S12C32
EE345M Lab 25b. SPI
     PM5-2        SPI/EEPROM output
     PS1,PS0      SCI/RS232 to PC
     PT1-PT0      debugging LEDs
EE345M Lab 22. Temperature measurement
     PAD7,6         switch inputs
     PAD1          10-bit analog input
     PAD0,PM5-PM2,PT7-6 LCD
     PT4,3,2    green, yellow red LEDs
     PT1-0      debugging LEDs
EE345M Lab 10d. CAN Network (2 weeks) group of 4
     PM1,PM0      CAN port to network
     PAD7,6         switch inputs
     PAD1          10-bit analog input
     PAD0,PM5-PM2,PT7-6 LCD
     PT4,3,2    green, yellow red LEDs
     PT1-0      debugging LEDs
EE345M Lab 17. Real-time operating system
     PT7-PT0      debugging outputs
     PAD0,PM5-PM0 LCD
     PAD7,6         switch inputs

How to test the 9S12C32 board.
Check out from the second floor, the orange 9S12C32 board tester.
    0) Download and unzip the Tester.zip programs from this website
        http://www.ece.utexas.edu/~valvano/metrowerks/
    1) plug the 9S12C32 docking module into testing protoboard/ZIF socket
    2) connect RS232 cable to docking module
    3) place the 9S12C32 in BOOT mode
    4) apply power to the docking module
    5) hit reset on the docking module
    6) run Metrowerks and download this program (Project->Debug)
    7) quit Metrowerks and start a terminal program e.g., Hyperterm
        set COM port to match the cable, and baud rate 115200 bits/sec
        8 bit data, no parity, no hardware flow control
    8) place the 9S12C32 in RUN mode
    9) hit reset on the docking module

Lastly, I recommend the following general guidelines
1) Cut out a piece of paper trimming it as close to the writing as possible (handed out in kit), and place it between the docking module and the protoboard.
2) Never remove the CPU module from the docking module. THE PINS ON THE CPU MODULE ARE VERY FRAGILE. On the other hand, the male pins on the docking module have been very robust as long as you limit the twisting forces. I.e., to push the docking module into the protoboard, push straight down. To remove the docking module from the protoboard pull straight up (or at least pull up a little at a time on each end.)
3) Touch a grounded object before handling CMOS electronics. Try not to touch any exposed wires.
4) Use and store the system with the docking module plugged into a protoboard (this will reduce the chances of contacting the metal pins tied directly to the 6812 with either your fingers or stray electrical pulses).
5) Do not use the 9S12C32 with any external power sources, other than the supplied wall-wart. In particular, avoid connecting signals to the 6812 that are not within the 0 to +5V range.
6) Label all the pieces (CPU module, docking module, cable, wall wart, and protoboard) with your name.

Installing Metrowerks
CodeWarrior Version 3.1 will compile programs we need for EE319K/EE345L/EE345M. For version 3.1 you should use their 12K free educational license. There is an installer for Version 3.1 on the CD accompanying the second edition of the EE345L/EE345M textbook.
Follow these steps to install the Special edition of Metrowerks CodeWarrior Version 4.5
1) http://www.freescale.com/
2) click "CodeWarrior Development Tools" under Products
3) click "HCS12(X)" under CodeWarrior Products
4) scroll down and click "CWX-H12SX-SE" labeled Special Edition Evaluation for CodeWarrior Development Studio for HCS12X Microcontrollers V4.5
5) Register as a new user (if you have registered before, just log in)
   email must be correct
   decide whether or not you want email from Metrowerks
6) Fill in the page with "project details" stating you are a student taking a class, fill in all required fields
7) Download CW12_V4_5.exe (320 MB) and install (the special edition does not require downloading a separate license)
8) Download instructions and starter projects from my web site at
http://www.ece.utexas.edu/~valvano/metrowerks/

Software Style
There will be no use of floating point in EE345M at all. Low-cost microcontrollers like the 6812 do not have hardware support for floating point operations, so it takes a long time and a lot of memory to perform floating point operations. Compilers like Metrowerks and ICC12 have added software-based floating point support in order to meet the C language standard and to support those programmers too stupid or too lazy to figure out fixed-point. 10 years from now $1 to 10 microcontrollers like the 6812 may have floating point hardware, and when they do you have my permission to use it, but for now we need to use fixed-point.

The interrupt vectors of the 9S12C32 that we will use are
0xFFD6            interrupt 20 SCI
0xFFDE            interrupt 16 timer overflow
0xFFE0            interrupt 15 timer channel 7
0xFFE2            interrupt 14 timer channel 6
0xFFE4            interrupt 13 timer channel 5
0xFFE6            interrupt 12 timer channel 4
0xFFE8            interrupt 11 timer channel 3
0xFFEA            interrupt 10 timer channel 2
0xFFEC            interrupt 9 timer channel 1
0xFFEE            interrupt 8 timer channel 0
0xFFF0            interrupt 7 real time interrupt
0xFFF6            interrupt 4 SWI software interrupt
0xFFF8            interrupt 3 trap software interrupt
0xFFFE            interrupt 0 reset

To understand CPOL/CPHA mode selection see Figure 7.45 in the textbook. The two bits CPOL and CPHA determine the shape of the SCLK. There are two things to specify:
A) is the clock normally high (high level during the idle time) or normally low (low level during the idle time)
B) is the data clocked in/out of the master on the rise or fall of the clock.
Do not think of these two bits separately, but think of them together. Together the two bits CPOL and CPHA specify the idle-time logic level of the clock and which edge the master clocks the data out. As a design goal, you need the master to clock on one edge and the slave to clock on the other edge. Assuming the 6812 is master, the four modes are
CPOL=0, CPHA=0: clock is normally low, data is shifted out of master on fall (use this mode in Lab 6)
CPOL=1, CPHA=0: clock is normally high, data is shifted out of master on rise
CPOL=0, CPHA=1: clock is normally low, data is shifted out of master on rise
CPOL=1, CPHA=1: clock is normally high, data is shifted out of master on fall
The 6812 will be the master and some peripheral chip, like the DAC will be the slave. SPI can be used to connect two 6812s together, in which case one is master and the other is slave. We will not be covering this situation in EE345M. To understand SPI timing see Figure 7.44 in the textbook. Define T as the SPI clock period. Define t=0 at the active edge used by the master to shift out. The master out data will be ready (correct, valid) 50 ns later. The active edge used by the slave to shift in will be at time T/2, because it is a 50% duty cycle wave. The slave expects the data tsu before its clock, so 50<T/2-tsu. In addition the hold time must be met
T/2+th<T

Book typos are including in the lab manual
(let me know if you find some), see special page of typos

Quiz 1 Study guide(2005 version):
Lab Important Topics
25b. SPI interface
22. 6812 ADC, analog amplifiers, digital filters,
        fixed point numbers, resistor bridge, op amps
Chapter Topic
1,2,4 6812 architecture and assembly language, debugging, threads interpreting output of the C compiler (parameters, locals, globals) C programming (const, static, volatile, long, #define, #pragma abs_address:0xfffe)
11, 12     Analog Circuits, amplifiers, ADC, DAC, data acquisition systems
                    both +5V single supply and +12/-12V dual supply op amps, AD620
11.9, 15 Digital filters implementations, multiple access circular queue
Guarantees
        Interrupts: data structures, latency, debugging
        Interrupt software

Programming
EE345L Spring 2001 Question 1, static, volatile, const (see section I.4.2.7. on page 11 of the lab manual)
Fall 2001, Final, Question 4, Periodic interrupt, Real-time programming, FIFOs
Fall 2000, Final, Question 4, FIFO bug
Fall 2002, Quiz1, Question 3, programming syntax, definitions

Debugging
Spring 2002, Quiz 1, Question 1, FIFOs, debugging, I/O bound
Fall 2001, Quiz 1, Question 3, debugging, friendly, critical section, intrusiveness
Spring 2001, Quiz 1, Question 2, serial port debugging, intrusiveness
Spring 2000, Quiz 2, Question 3, debugging, measuring execution speed
Fall 2000, Final, Question 5, intrusiveness of the OutChar function, DEBUG macro
Fall 2002, Quiz 1, Question 1, debugging, profiling, interrupts

SPI interface
Spring 2000, Final, 1 (b-e), SPI interface
Spring 2001, Final, 3, SPI interface

Data acquisition systems, Analog circuits, Fixed- Point Digital Filters
Spring 2000, Quiz2, 1, DAS, filter implementation, fixed point
Spring 2000, Quiz2, 2, DAS, filter implementation, fixed point
Spring 2000, Quiz2, 3, Periodic interrupts, debugging
Spring 2000, Quiz2, 4, Analog circuit design
Summer 00, Quiz2, 1, Digital filter implementation
Summer 00, Quiz2, 2, Pressure DAS
Fall 2000, Quiz2, 1, DAS, filter implementation, fixed point
Fall 2000, Quiz2, 2, Analog amplifier
Fall 2001, Quiz2, 1, Digital filter implementation
Fall 2001, Quiz2, 3, Analog amplifier
Spring 2002, Quiz2, 1, Digital filter implementation
Spring 2002, Quiz2, 2, Analog amplifier
Spring 2002, Quiz2, 3, DAS
Fall 2001, Final, 1, Analog amplifier
Fall 2001, Final, 4, Real time DAS, choose maximum fs

More Data acquisition systems, Analog circuits, Fixed Point Digital Filters
Do not worry about LPF or HPF
Spring 98, Quiz, 1, Nonlinear analog circuit
Spring 98, Quiz, 3, ADC interface, digital filter, DAS software
Summer 98, Quiz, 1, EKG DAS, analog circuit, HPF, LPF
Fall 98, Quiz, 1, Mass DAS, analog circuit, LPF
Spring 99, Quiz, 1, Position DAS, analog circuit, LPF
Summer 99, Quiz, 2, Resistance DAS, analog circuit, LPF
Fall 99, Quiz, 2, Digital Filter Implementation
Spring 98, Final, 1, Pressure DAS, analog circuit, LPF
Summer 98, Final, 1, Variable gain analog amplifier
Fall 98, Final, 1, Resistance DAS, analog circuit, LPF
Spring 99, Final, 1, Analog amplifier
Spring 99, Final, 4, Software debugging on a DAS
Summer 99, Final, 3, Nonlinear analog circuit
Fall 99, Final, 2, Pressure DAS, analog circuit, LPF

EE345M Quiz 2 study guide (correct for Fall 2005):
Lab Important Topics
10. CAN interrupts, CAN drivers, software device driver, real time debugging
17. Real time OS, semaphores, critical sections, synchronization, communication
Chapter            Topic
4                      fifo, statically allocated linked lists, dynamically allocated linked lists,
                        interrupts, latency, real time interrupts, periodic polling, critical sections
14                    CAN interrupts
5                      scheduling, stack, semaphore implementation, semaphore applications
Guarantees
Interrupt program (arm, enable, protocol, fifo) (OC and SCI)
Network Concept (bandwidth, synchronization, priority, latency, error detection)
OS scheduler program
OS Concept (bounded waiting, deadlock, aging, starvation, mutual exclusion)
Semaphore application (study the book examples)
Study ideas
Collision prevention/arbitration used by CAN
Add sleep, create, kill
Could you design an OS that was a pure cooperative scheduler?
(this system would have separate stacks, but no thread switch OC interrupt)
Can you write a software interrupt handler?
Real time OS, semaphores, critical sections, synchronization, communication
Spring 2001,Quiz2, Question 2, Sleep primitive
Fall 2001,Quiz2, Question 4, Priority scheduler, deadlock
Spring 2002, Quiz1, Question 3, Dynamic thread allocation, thread Kill
Fall 2002, Quiz2, Question 2, application of semaphores
Fall 2002, Final, Question 4, use of semaphores
Fall 2002, Final, Bonus questions 1,2,6, assembly language used in OS programming
Fall 2003, Quiz1, Question 2, use of semaphores
Fall 2003, Quiz1, Question 3, changing the TCB
Fall 2003, Quiz1, Question 4, definition of time jitter
Fall 2003, Quiz1, Question 5, implementation of OS_Wait
Fall 2003, Final, Question 14, definitions of OS concepts/terms
Fall 2004, Quiz2, Question 2, use of semaphores to implement rendezvous
Fall 2004, Quiz2, Question 3, implementation of binary semaphore
Fall 2004, Quiz2, Question 4, sampling time-jitter
Fall 2004, Quiz2, Question 5, definitions of OS concepts/terms
Fall 2004, Final, Question 9, thread sequencing using Path Expression
SCI interrupts
Fall 2003, Quiz1, Question 1, SCI interrupts and use of fifo
Fall 2003, Final, Question 7, Sequence of events in a SCI interrupt
Fall 2003, Final, Question 8, SCI data flow graph
Fall 2004, Quiz2, Question 1, SCI interrupts and bandwidth
If you are going to study two things, look at Fall 2003 Quiz1 and Fall 2004 Quiz2.

Final Study guide (correct for Fall 2005):
Lab Important Topics
29. Pulse width modulation, transistor interfaces, back EMF, MOSFETs
      Period measurement, sensor interfacing, hardware to convert analog to digital
      Control system, either PID or Fuzzy, periodic interrupts, discrete derivative
Chapter Topic
3, 4       Choosing between real time, gadfly, interrupts, periodic polling
6           Input capture, period measurement, pulse width measurement
6           Output compare, pulse-width modulation, frequency measurement
8.4, 8.5 6N139 isolation, solenoids, DC motors, back EMF
9           Timing equations, timing syntax, 9S12C32 address latch,
                   interface of RAM and ROM to a 9S12C32 in expanded narrow mode,
                   Address translation, PPAGE paged memory
13        Control Systems, open loop, closed loop,
                  PID design and implementations, Fuzzy Logic design and implementation
Memory interfacing, timing diagrams, paged addressing
Spring 2002, Quiz 1, Question 2, memory interface, timing diagram
Spring 2001, Quiz 2, Question 1, RAM interface
Fall 2001, Quiz 2, Question 2, expanded/extended mode memory interface
Fall 2000, Quiz 2, Question 3, memory interface timing
Fall 2001, Final, Question 2, Memory interface timing
Fall 2001, Final, Question 5, PPAGE extending mode addressing
Fall 2000, Final, Question 2, timing diagram syntax
Fall 2002, Final, Question 3, reading memory data sheet timing diagram
Spring 2000, Final, Question 4, memory interfacing
Spring 2001, Final, Question 2, timing diagram syntax
Scheduling, stack, semaphore implementation, semaphore applications

Guarantees
        Control system implementation
        Multiple source interrupts with synchronization
        Input capture or output compare: period or pulse width measurement
        Memory interface: timing analysis, diagrams, Program Page on the 9S12C32
        Analog circuits
        Input capture or output compare: measurement or signal generation

Timer System
Fall 2001, Final, Question 6, Square wave generator, device driver
Fall 2000, Final, Question 1, Pulse width measurement
Spring 2000, Final, Question 2, Pulse width measurement
Fall 1998, Final, Question 2, DAS using Period measurement
Fall 1998, Final, Question 6, two computer network using input capture
Fall 1999, Final, Question 1, Frequency measurement
Spring 1998, Final, Question 3, phase-shifted square wave outputs
Spring 1999, Final, Question 2, doppler frequency using input capture

Control Systems
Fall 2001, Final Question 3, PID controller implementation
Fall 2000, Final, Question 6, Fuzzy logic calculations
Spring 2001, Final Question 4, PID controller implementation
Fall 1998, Final, Question 5, Fuzzy logic output rate
Summer 1998, Final Question 4, PID controller implementation
Summer 1999, Final, Question 1, motor controller using input capture

If you have comments or suggestions, email me at valvano@mail.utexas.edu