EE345M Microcomputer Interfacing Lab Spring 2002
Class: ENS115 Monday, Wednesday 9 to 9:50am, Lab: ENS252C
Office Hours: Mon. 10-10:45am, Wed. 12-2pm, Fri. 9-10am, Fri 1-2
Instructor: Jonathan W. Valvano, ENS627, 471-5141, Lab ENS619/621 (1-1216)
email valvano@uts.cc.utexas.edu
Web page http://www.ece.utexas.edu/~valvano
Unique Numbers: 14715 Tue 9-12, 14720 Tue 7-10, 14725 Thur 7-10
EE345L and EE345M TAs:
Anand Rajan, arajan@ece.utexas.edu, Tue, 9-12, Tue 7-10,
(HEAD TA)
Anil Kottam, kottam@ece.utexas.edu, Wed 3:30-6:30
Hyunjin Shin, hjshin@ece.utexas.edu, Tue 3:30-6:30, Thur
7-10
Chia-ling Wei, clwei@mail.utexas.edu, Thur 3-6
Jignesh Shah, jignesh_s@softhome.net, Wed 7-10, Thur 9-12
Divyashree Sundaresha, divyashree_s@yahoo.com, Wed 12-3
Reference materials: Data sheets for most of the devices used in this class are available
as pdf files on the lab network and on the CD. Please make sure
you have access to the MC68HC812A4 Technical Summary, and the
MC68HC812A4 Electrical Specifications
Text: Embedded Microcomputer Systems, Brooks-Cole 2000, by J. W. Valvano
IEEE Parts:
1 prototype board per student (2 per group)
Lab supplies: resistors, 3.5 inch floppy disks, wires, lock for 2nd floor locker
HKN: Spring 2002 EE345M Laboratory Manual by J. W. Valvano
Other references: For programming in C and op amps, see the EE360C and EE338K
texts
Also see Kelly/Pohl, A Book on C, Benjamin Cumming Publishing
Prerequisites: EE345L or EE345S, EE338K, and EE155. There will be no re-tests,
make-ups, or incompletes.
Specific Objectives of EE345M
Review of 6812 architecture, and C programming
Synchronization methods
Gadfly, interrupt, DMA, periodic polling, priority interrupts
Review of Microcomputer Bus Interfaces
Timing equations, timing diagrams,
Address translation and extended mode
Solid-state disk, file system management
Real time operating systems
Foreground and background thread scheduling
Synchronization using spinlock and blocking semaphores
Interthread communication, networks
Digital Device Interfaces
Diodes, transistors, DC motors, servos, stepper motors, relays,
solenoids,
Optical sensors and optical isolation
Time Domain Interfaces
Input capture/output compare, frequency, period and pulse width
measurements,
Pulse-width modulation
Data Acquisition Systems
Op amp amplifiers, DAC, ADC
Thread scheduling, digital filters
Control systems
Open loop and closed loop, Linear and Nonlinear,
Bang-bang, incremental, PID, Fuzzy Logic Control
Attendance: Students are expected to attend lectures. The book covers more
information than the class and we will use lectures to map our
way through the book. If you miss class you may find it difficult
to catch up.
Grading: 40% Laboratory
15% In class Quiz1, open book, Wednesday, March 6, 9:00
am to 9:50 am, in regular class room
15% In class Quiz2, open book, Wednesday, April 10, 9:00
am to 9:50 am, in regular class room
30% Final, open book, Thursday, May 9, 9am-12noon, regularly
scheduled
Your grade will be assigned on the usual 60, 70, 80, 90 basis.
An average above 70 is required to receive a credit (CR/NR).
Lab Partners: All labs should be performed with a partner. The lab partnership
must be registered with the TA (a simple hand written note signed
by both students will suffice) at least a week before the assignment
is due. Once registered, the partnership will continue. A partnership
can be dissolved only after discussion with the TA. Both partners
must be present during the demonstration. It is expected that
both partners will contribute to all aspects of each lab, and
both partners are expected to be present during the check out.
The point values are the same for all labs. The TA will sign your
software listing when you demonstrate your system. All parts of
the assignment must be demonstrated to a TA by the end of your
lab period the week shown in the column labeled "Demo/Report".
The report (hardware/software/data plots) are due one day after
the demonstration is due. Please consult with your TA for specific
due dates for your lab section. Motor Controller
EE345M Laboratories
13. Real time debugging
25. Solid state secondary storage
17. Real-time operating system
21. Digital to analog conversion, sine wave generation
22. Temperature data acquisition, analog amp, and digital filter
Embedded Control System (do either the Motor Controller or the
Robot Project)
Motor Controller
14. Optical isolation, pulse width modulated squarewave generation,
motor interface
15. Period measurement of a DC motor tachometer
23. PID or fuzzy logic motor control, pulse width modulation,
period measurement
Robot Project TBA
Preliminary EE345M Laboratory Schedule (see your TA for the latest)
Week
Quiz
Preparation
Demo/Report
Comments
1/21
none
none
none
Demonstration, Partners chosen
1/28
13
13
none
2/4
25
25
13
2/11
none
none
first part
demo part of Lab 25
2/18
17
17
25
2/25
none
none
first part
demo part of Lab 17
3/4
21
21
17
3/18
22
22
21
3/26
none
none
first part
demo part of Lab 22
4/1
14
14
22
4/8
15
15
none
4/15
23
23
22
4/22
none
none
first part
demo part of Lab 23
4/29
none
none
23
Turn in equipment by 5/3
You have the option of proposing alternative labs, forming groups
of ranging from 2 to 4 students. These groups may include students
from other lab sections. The alternative lab must generally cover
the same educational objectives as the lab you wish to replace.
During the week of January 21, please go to your regularly scheduled
lab in ENS252C to hear a TA explain the lab grading policy. If
you miss your section, go to one of the other sessions. ImageCraft
Adapt812 boards will be passed out and lab partners will be selected
in your lab the week of January 21-25 (bring a lock for the locker).
The Lab 13 preparation is due at the beginning of your lab the
week of January 28-February 1. Preparation includes hardware wiring
diagrams and syntax-free software printouts. In other words, please
type your software into the PC before lab. The lab preparations
(hardware diagrams and syntax-free software source code printouts)
are due at the beginning of your lab period. Attendance in lab
is required. All software for lab, and tests must include comments.
All hardware must include R&C values specifying tolerance and
type (e.g., 5% carbon), and TTL chip numbers (be very specific
e.g., 74LS00). Pin numbers are required only for lab, not for
the exams.
Students are encouraged to go to the last 2 hours of the other
lab periods (including when EE345L labs are scheduled), but the
first priority will be to the regular students. Because of the
lab quiz, the first hour of lab is restricted to the regular students.
CLEAR OUT BY 15 minutes before the start of lab. At the end of
the semester please verify with the checkout counter that your
record is clear. All reports must be given to the TA by Friday
May 3, 12 noon..
Date
Chapter
Topic
1/14
1,2,4
EE345L review, 6812 introduction, ICC12 compiler, device drivers
using SCI12.H SCI12.C as examples, real time, quality software,
friendly
1/16
2,4,7
Lab environment, 6812 debugging techniques, intrusiveness, monitor,
output to scope, SCI interrupts, TExaS simulator
1/23
2
Modular programming, call graphs, flow charts, data flow graphs,
show differences between SCI12.C and SCI12A.C
1/28
9
Timing diagrams, 6812 bus timing, RDA overlaps RDR, WDA overlaps
WDR, 2K RAM interface, explain layered approach to Lab 25 file
system.
1/30
9
6812 extended RAM interface, DPAGE address translation,
2/4
9
Address translation, directory, contiguous versus linked file
system, free space management, recovery from lost block, internal
fragmentation, external fragmentation
2/6
6,5
0utput compare interrupts, threads, TCB, switching, run Lab17.c on TExaS
2/11
5
Spinlock semaphores, draw initial TCB, performance measures (response
time, throughput)
2/13
5
Debugging using output pins, Blocking semaphores, use of the FIFO,
and thread communication, add cooperative multitasking to Lab17os.c
2/18
5
Blocking semaphores, priority scheduling
2/20
11
DAC, SPI interface, Signal generation
2/25
11
resistors, capacitors, analog circuits, amplifiers using op amps,
integrated instrumentation amplifier (AD620)
2/27
12
Data acquisition systems, sampling rate, precision, impedence,
range
3/4
12
ADC software, data acquisition systems
3/6
Quiz 1 in class, covering material in Labs 13,25,17
3/18
15
Digital filters, Z transform, fixed point implementation, effect
of sampling jitter
3/20
8
Transistor interfaces (TIP120, L293, IRF540), optical isolation,
motor interfacing
3/25
6
Pulse width modulation, using output compare
3/27
6
Input capture, simple period measurement
4/1
13
Control systems, bang-bang, incremental
4/3
13
Fuzzy Logic Control Systems
4/8
13
PID control systems
4/10
Quiz 2 in class, covering material in Labs 21,22
4/15
13
pulse width measurement
4/17
memory management, heap.h and heap.c
4/22
10
High speed interfaces
4/24
10
DMA
4/29
14
distributed systems
5/1
Review, course evaluation
5/3
All Lab notebooks are due to the TA at 12 noon
5/3
Turn in Lab Equipment so that Mona won’t bar your registration
5/9
Final exam, 9am-12noon, Room regularly scheduled
Sections from the book required to perform the labs
1.6. Digital Logic And Open Collector
2.11. Debugging Strategies
4.5.4. MC68HC812A4 Interrupt Vectors And Priority (Review)
7.6.2. SCI Receive Only Interrupt Interface
Lab Example SCI12.H SCI12A.C (Review)
8.4. Transistors Used For Computer Controlled Current Switches
8.5.5. Pulse Width Modulated DC Motors
8.5.6. Interfacing EM Relays, Solenoids, And DC Motors
Figure 8.70 (IRF540, 6N139)
6.2.1. General Concepts
6.2.2. Output Compare Details
6.2.3. Periodic Interrupt Using Output Compare (Review)
6.2.5. Pulse Width Modulation
6.1.1 Basic Principles Of Input Capture
6.1.2. Input Capture Details
6.1.3. Real Time Interrupt Using An Input Capture
6.1.4. Period Measurement (Not 32-Bit)
6.4.1. Using Period Measurement To Calculate Frequency
5. Threads (6812, but not 6811)
9.5.3. Motorola MC68HC812A4 External Bus Timing (Review)
9.7.2.2 8K RAM/6812 Interface (Review)
9.7.5. Extended Address Data Page Interface To The MC68HC812A4
Covered on the exams, but not necessary for the labs
6.1.5. Pulse Width Measurement
6.3. Frequency Measurement
6.3.1. Frequency Measurement Concepts
6.3.2. Frequency Measurement with frequency resolution of 100Hz
6.5. Measurements Using Both Input Capture And Output Compare
6.5.1. Period Measurement with period resolution of 1ms
6.5.2. Frequency Measurement with frequency resolution of 0.1Hz
10. High Speed I/O Interfacing
10.1. The Need For Speed
10.2. High Speed I/O Applications
10.3. General Approaches To High Speed Interfaces
10.4. Fundamental Approach To DMA
11.2.7.5 Subtracter Circuits
11.2.7.6 Instrumentation Amp (AD620)
14.1. Network
14.3. Parallel Bus
7.3.3. RS485 half-duplex network
Legal Stuff: The 12th class day is January 30. After this date, I will sign
a drop only if the Dean approves it. Your current grade status
must be a "C" or better for you to receive a "Q". Course evaluation
is conducted on the last class day in accordance with the Measurement
and Evaluation Center form. The final exam is at the time and
place stated in the course schedule. The University of Texas at
Austin provides upon request appropriate academic adjustments
for qualified students with disabilities. For more information,
contact the Office of the Dean of Students with Disabilities at
471-6259, 471-4241 TDD.
Cheating: Cheating is very uncivilized behavior and is to be avoided at
all cost. You are allowed to talk to your classmates about the
lab assignments, but you are NOT allowed to look at each other’s written work. Oral discussion about an assignment is encouraged and is not considered to be cheating. Copying of any part of a program is
cheating without explicit reference to its source. If we find
two programs that are copied, there will be a substantial penalty
to both students, e.g., failure in the course. Students who cheat
on tests or in lab will fail. Prosecution of cases is very traumatic
to both the student and instructor. PLEASE DO YOUR OWN WORK. Policies concerning the use of other peoples’ software in this
class:
• I strongly encourage you to study existing software.
• All applications and libraries must be legally obtained. E.g.,
You may use libraries that came when you bought a compiler.
You may use software obtained from a BBS or on the WWW.
You may copy and paste from the existing source code.
• You may use any existing source code that is clearly referenced
and categorized:
original: completely written by you,
derived: fundamental approach is copied but it is your implementation,
modified: source code significantly edited to serve your purpose,
copied: source code includes minor modifications.
Places to buy prototyping boards and other parts
In Austin
AlTex Electronics
832-9131
Tinkertronics
719-3560
Howard Electronics
837-2525
Mail Order
BG Micro, Dallas
1-800-276-2206
www.bgmicro.com
All Electronics, Los Angeles
1-800-826-5432
www.allelectronics.com
Marlin P. Jones
1-800-652-6733
www.mpja.com
TechAmerica, Fort Worth
1-800-877-0072
Hosfelt, Steubenville, OH
1-888-264-6464, 1-800-524-6464
Jameco, Belmont CA
1-800-831-4242
www.jameco.com
STUDY GUIDE Quiz 1
Lab Important Topics
13. SCI interrupts, RS232 drivers, software device driver, real
time debugging
25. Memory interfacing, address translation
17. Real time OS, semaphores, critical sections, synchronization,
communication
Chapter Topic
1,2,4 6812 architecture and assembly language, debugging,
threads
interpreting output of the C compiler (parameters,
locals, globals)
C programming (const, static, volatile, long,
#define, #pragma abs_address:0xfffe)
4 fifo’s, statically allocated linked lists, dynamically
allocated linked lists,
interrupts, latency, real time interrupts,
periodic polling, critical sections
7 SCI interrupts
9 Address decoding, timing syntax, synchronous, partially
asynchronous,
fully asynchronous, general approach to interfacing,
interface of RAM and ROM to a 6812 in expanded
narrow mode,
data bus drivers (no 16-bit, 6811, DRAM, parity
check),
Address translation, paged memory
Guarantees
Interrupts: data structures, latency, debugging
Interrupt software
Memory interface: timing analysis, diagrams, design, CS
initialization
STUDY GUIDE Quiz 2 (Quiz 1 stuff plus the following)
Lab Important Topics
21. DAC interface, DAC signal generation
22. 6812 ADC, analog amplifiers, digital filters,
fixed point numbers, resistor bridge, op amps
Chapter Topic
11, 12 Analog Circuits, amplifiers, ADC, DAC, data acquisition
systems
both +5V single supply and +12/-12V dual
supply op amps, AD620
11.9, 15 Digital filters implementations, multiple access circular
queue
Guarantees
Data acquisition systems
Analog circuits
STUDY GUIDE Final (Quiz 1 and Quiz 2 stuff plus the following)
Lab Important Topics
14. Optical isolation, pulse width modulation, transistor interfaces,
back EMF, MOSFETs
15. Period measurement, sine wave to square wave, AC to TTL conversion
23. Control system, either PID or Fuzzy, periodic interrupts,
discrete derivative
Chapter Topic
3, 4 Choosing between real time, gadfly, interrupts, periodic
polling, DMA
6 Input capture, period measurement, pulse width measurement
6 Output compare, pulse-width modulation, frequency
measurement
8.4, 8.5 6N139 isolation, solenoids, DC motors, back EMF
10 DMA concepts, single vs. dual cycle, block (burst)
vs. cycle steal,
software synchronization, bandwidth, latency,
address increment,
block size, autoinitialization (reloads parameters
and loops continuously)
13 Control Systems, open loop, closed loop,
PID implementations, Fuzzy Logic design and
implementation
Guarantees
Control system implementation
Multiple source interrupts with synchronization
Input capture or output compare: period or pulse width
measurement
Memory interface: timing analysis, diagrams, design, CS
initialization
Analog circuits
Input capture or output compare: measurement or signal
generation
Curious about my research? See
http://www.ece.utexas.edu/~valvano/research