EE345M Embedded and Real-Time Systems Lab
Class: ENS127, Monday, Wednesday 10-10:50am
Office Hours: Monday 11-12, Wednesday 2-3, Friday 10-11
Instructor: Jonathan W. Valvano, ENS627, 471-5141
email valvano@mail.utexas.edu, schedule  
Web page http://www.ece.utexas.edu/~valvano
Unique Numbers: 14675 W12-3, 14680 Th3:30-6:30, 14685 W6-9
Text: Embedded Microcomputer Systems, Brooks-Cole 2000, by J. W. Valvano
Best TAs ever
:                 
        Anil Kottam, kottam@ece.utexas.edu, (HEAD TA)
        Chia-ling Wei, clwei@mail.utexas.edu, 
        Jignesh Shah, jignesh_s@softhome.net, 
        Icaro Santos, icaro@ieee.org, 
        David Altman, gautam@mail.utexas.edu, 
        Nachiket Kharalkar, knachike@ece.utexas.edu,
        Robin Tsang         
Reference materials: Data sheets for most of the devices used in this class are available as pdf files on the lab network and on the CD. Please make sure you have access to the MC68HC812A4 Technical Summary, and the MC68HC812A4 Electrical Specifications
IEEE Parts: any TTL Data Book includes either LSTTL or HC parts
   1 prototype board per student (2 per group)
   Lab supplies: resistors, 3.5 inch floppy disks, lock for 2nd floor locker
HKN: Spring 2003 EE345M Laboratory Manual by J. W. Valvano
Other references: For programming in C, see the EE312C text or
   Also see Kelly/Pohl, A Book on C, Benjamin Cumming Publishing
Prerequisites: EE345L or EE345S. There will be no re-tests, make-ups, or incompletes.
Specific Objectives of EE345M
Review of 6812 architecture, and C programming
Synchronization methods
    Gadfly, interrupt, DMA, periodic polling, priority interrupts
Review of Microcomputer Bus Interfaces
    Timing equations, timing diagrams,
    Address translation and extended mode
    Solid-state disk, file system management
Real time operating systems
    Foreground and background thread scheduling
    Synchronization using spinlock and blocking semaphores
    Interthread communication, networks
Digital Device Interfaces
    Diodes, transistors, DC motors, servos, stepper motors, relays, solenoids,
    Optical sensors and optical isolation
Time Domain Interfaces
    Input capture/output compare, frequency, period and pulse width measurements,
    Pulse-width modulation
Data Acquisition Systems
    Op amp amplifiers, DAC, ADC, Thread scheduling, digital filters
Control systems
    Open loop and closed loop, Linear and Nonlinear,
    Bang-bang, incremental, PID, Fuzzy Logic Control
Grading: 40% Laboratory
    15% In class Quiz1, Wednesday February 26, 10-10:50am, in regular class room
    15% In class Quiz2, Wednesday April 2, 10-10:50am, in regular class room
    30% Final, Wednesday May 7, 9am-12 noon, regularly scheduled
Your grade will be assigned on the usual 60, 70, 80, 90 basis. An average above 70 is required to receive a credit (CR/NR).
Attendance: Students are expected to attend lectures. The book covers more information than the class and we will use lectures to map our way through the book. If you miss class you may find it difficult to catch up.
Lab Partners: All labs should be performed with a partner. The lab partnership must be registered with your TA (a simple hand written note signed by both students will suffice) at least a week before the assignment is due. Once registered, the partnership will continue. A partnership can be dissolved only after discussion with the TA. Both partners must be present during the demonstration. It is expected that both partners will contribute to all aspects of each lab, and both partners are expected to be present during the check out. The point values are the same for all labs. The TA will sign your software listing when you demonstrate your system. All parts of the assignment must be demonstrated to a TA by the end of your lab period the week shown in the column labeled "Demo/Report". Any EE345L/EE345M TA is authorized to checkout your lab.  The report (hardware/software/data plots) are due one day after the demonstration is due. Please consult with your TA for specific due dates for your lab section.
EE345M Laboratories
13. Real time debugging
4d. PCB layout of RAM interface (optional)
17. Real-time operating system
21. Digital to analog conversion, sine wave generation
22. Temperature data acquisition, analog amp, and digital filter
25. Solid state secondary storage
Maze-Solving Robot (teams of 3, 4, or 5)
        26A. Motion/steering actuator design and interfacing
        26B. Sensor design and interfacing
        26C. Control algorithm, system performance analysis
Preliminary EE345M Laboratory Schedule (see your TA for the latest)
Week of Preparation Demo/Report Comments
1/13 no lab activities this week
1/20 none none  Demonstration, Partners, boards
1/27 13 none
2/3 4d 13  
2/10 17 4d
2/17 none first part demo part of Lab 17
2/24 21 17 quiz1 is this week
3/3 22 21  
3/17 none first part demo part of Lab 22
3/24 25 22
3/31 26A 25 quiz2 is this week
4/7 show robot moving
4/14 26B 26A  
4/21 26C 26B  
4/28 none 26C Turn in equipment by 5/2

    You have the option of proposing alternative labs, forming groups of ranging from 2 to 4 students depending on the difficulty of the alternative lab. These groups may include students from other lab sections. The alternative lab must generally cover the same educational objectives as the lab you wish to replace.
    No lab activities occur during the week of January 13-17. During the week of January 20, please go to your regularly scheduled EE345M lab in ENS252C to hear a TA explain the lab grading policy. Technological Arts Adapt812 boards will be passed out and lab partners will be selected in your lab the week of January 20. The Lab 13 preparation is due at the beginning of your lab the week of January 27-31. Preparation includes hardware wiring diagrams and syntax-free assembly printouts. In other words, please type your software into the PC before lab. The lab preparations (hardware diagrams and syntax-free software source code printouts) are due at the beginning of your lab period. Attendance in lab is required. All software for lab, and tests must include comments. All hardware must include R&C values specifying tolerance and type (e.g., 5% carbon), and TTL chip numbers (be very specific e.g., 74LS00). Pin numbers are required only for lab.

Date Chapter Topic
1/13 2, 4, 7 Modular programming, call graphs, flow charts, data flow graphs, show differences between SCI12.C and SCI12A.C, ICC12 compiler, device drivers, quality software, friendly
1/15 2, 4, 7 Lab environment, 6812 debugging techniques, intrusiveness, monitor, output to scope, SCI interrupts, TExaS simulator, real time
1/22 9 Memory interfacing, PCB layout
1/27 5, 6 Output compare interrupts, threads, TCB, switching, run Lab17.c on TExaS
1/29 5, 6 Spinlock semaphores, draw initial TCB, performance measures (response time, throughput)
2/3 5 Debugging using output pins, Blocking semaphores, use of the FIFO, and thread communication, add cooperative multitasking to Lab17os.c
2/5 5 Blocking semaphores, priority scheduling
2/10 7, 11 DAC, SPI interface, Signal generation
2/12 11 resistors, capacitors, analog circuits, amplifiers using op amps, integrated instrumentation amplifier (AD620) 
2/17 11, 12 Data acquisition systems, sampling rate, precision, impedance, range
2/19 12 ADC software, data acquisition systems
2/24 15 Digital filters, Z transform, fixed point implementation, effect of sampling jitter
2/26 2,4,5,7 Quiz 1 in class, covering material in Labs 13, 17
3/3 9 Timing diagrams, 6812 bus timing, RDA overlaps RDR, WDA overlaps WDR, 2K RAM interface, explain layered approach to Lab 25 file system. 
3/5 9 6812 extended RAM interface, DPAGE address translation,
3/17 9 Address translation, directory, contiguous versus linked file system, free space management, recovery from lost block, internal fragmentation, external fragmentation
3/19 8 Transistor interfaces (TIP120, L293, IRF540), optical isolation, motor interfacing
3/24 6 Pulse width modulation, using output compare
3/26 6 Input capture, simple period measurement
3/31 6 pulse width measurement
4/2   Quiz 2 in class, open book, covering material in Labs 13,17,21,22,25
4/7 13 Control systems, FSM, bang-bang, incremental
4/9 13 PID control systems
4/14 13 Fuzzy Logic Control Systems
4/16 13 Fuzzy Logic Control Systems
4/21 10 High speed interfacing, DMA
4/23 14 distributed systems
4/28 Review, course evaluation
4/30 Robot demonstrations in ENS lobby
5/2   All Lab notebooks are due to the TA at 12 noon
5/2   Turn in Lab Equipment so that Mona won't bar your registration
5/7   Final exam, Wednesday, 9am-12noon, Room regularly scheduled

    Students are encouraged to go to the last 2 hours of the other lab periods (including when EE345L labs are scheduled), but the first priority will be to the regular students. Because of the lab quiz, the first hour of lab is restricted to the regular students. CLEAR OUT BY 15 minutes before the start of lab. At the end of the semester please verify with the checkout counter that your record is clear. All reports must be given to the TA by Friday May 2, 12 noon.
Sections from the book required to perform the labs

1.6. Digital Logic And Open Collector
2.11. Debugging Strategies
4.5.4. MC68HC812A4 Interrupt Vectors And Priority (Review)
7.6.2. SCI Receive Only Interrupt Interface
Lab Example SCI12.H SCI12A.C (Review)
8.4. Transistors Used For Computer Controlled Current Switches
8.5.5. Pulse Width Modulated DC Motors
8.5.6. Interfacing EM Relays, Solenoids, And DC Motors
Figure 8.70 (IRF540, 6N139)
6.2.1. General Concepts
6.2.2. Output Compare Details
6.2.3. Periodic Interrupt Using Output Compare (Review)
6.2.5. Pulse Width Modulation
6.1.1 Basic Principles Of Input Capture
6.1.2. Input Capture Details
6.1.3. Real Time Interrupt Using An Input Capture
6.1.4. Period Measurement (Not 32-Bit)
6.4.1. Using Period Measurement To Calculate Frequency
5. Threads (6812, but not 6811)
9.5.3. Motorola MC68HC812A4 External Bus Timing (Review)
9.7.2.2 8K RAM/6812 Interface (Review)
9.7.5. Extended Address Data Page Interface To The MC68HC812A4
Covered on the exams, but not necessary for the labs
6.1.5. Pulse Width Measurement
6.3. Frequency Measurement
6.3.1. Frequency Measurement Concepts
6.3.2. Frequency Measurement with frequency resolution of 100Hz
6.5. Measurements Using Both Input Capture And Output Compare
6.5.1. Period Measurement with period resolution of 1ms
6.5.2. Frequency Measurement with frequency resolution of 0.1Hz
10. High Speed I/O Interfacing
10.1. The Need For Speed
10.2. High Speed I/O Applications
10.3. General Approaches To High Speed Interfaces
10.4. Fundamental Approach To DMA
11.2.7.5 Subtraction Circuits
11.2.7.6 Instrumentation Amp (AD620)
14.1. Network
14.3. Parallel Bus
7.3.3. RS485 half-duplex network
Legal Stuff: The 12th class day is January 29. After this date, I will sign a drop only if the Dean approves it. Your current grade status must be a "C" or better for you to receive a "Q". Course evaluation is conducted on the last class day in accordance with the Measurement and Evaluation Center form. The final exam is at the time and place stated in the course schedule. The University of Texas at Austin provides upon request appropriate academic adjustments for qualified students with disabilities. For more information, contact the Office of the Dean of Students with Disabilities at 471-6259, 471-4241 TDD.
Cheating: Cheating is very uncivilized behavior and is to be avoided at all cost. You are allowed to talk to your classmates about the lab assignments, but you are NOT allowed to look at each other's written work. Oral discussion about an assignment is encouraged and is not considered to be cheating. Copying of any part of a program is cheating without explicit reference to its source. If we find two programs that are copied, there will be a substantial penalty to both students, e.g., failure in the course. Students who cheat on tests or in lab will fail. Prosecution of cases is very traumatic to both the student and instructor. PLEASE DO YOUR OWN WORK. Policies concerning the use of other people's software in this class:
    … I strongly encourage you to study existing software.
    … All applications and libraries must be legally obtained. E.g.,
        You may use libraries that came when you bought a compiler.
        You may use software obtained from a BBS or on the WWW.
        You may copy and paste from the existing source code.
    … You may use any existing source code that is clearly referenced and categorized:
        original
: completely written by you,
        derived
: fundamental approach is copied but it is your implementation,
        modified
: source code significantly edited to serve your purpose,
        copied
: source code includes minor modifications.
Places to buy prototyping boards and other parts
In Austin

AlTex Electronics 832-9131
Tinkertronics 719-3560
Howard Electronics 837-2525

Mail Order

BG Micro, Dallas 1-800-276-2206 www.bgmicro.com
All Electronics, Los Angeles 1-800-826-5432 www.allelectronics.com
Marlin P. Jones 1-800-652-6733 www.mpja.com
TechAmerica, Fort Worth 1-800-877-0072  
Hosfelt, Steubenville, OH 1-888-264-6464, 1-800-524-6464  
Jameco, Belmont CA 1-800-831-4242 www.jameco.com

STUDY GUIDE Quiz 1
Lab Important Topics
13. SCI interrupts, RS232 drivers, software device driver, real time debugging
17. Real time OS, semaphores, critical sections, synchronization, communication
Chapter Topic
1,2,4     6812 architecture and assembly language, debugging, threads
                   interpreting output of the C compiler (parameters, locals, globals)
                  C programming (const, static, volatile, long, #define, #pragma abs_address:0xfffe)
4            fifo, statically allocated linked lists, dynamically allocated linked lists,
                     interrupts, latency, real time interrupts, periodic polling, critical sections
7           SCI interrupts
5         scheduling, stack, semaphore implementation, semaphore applications
Guarantees
        Interrupts: data structures, latency, debugging
        Interrupt software
 
STUDY GUIDE Quiz 2 (Quiz 1 stuff plus the following)
Lab Important Topics
21. DAC interface, DAC signal generation
22. 6812 ADC, analog amplifiers, digital filters,
        fixed point numbers, resistor bridge, op amps
25. Memory interfacing, address translation
Chapter   Topic
9           Address decoding, timing syntax, synchronous, partially asynchronous,
                    fully asynchronous, general approach to interfacing,
                    interface of RAM and ROM to a 6812 in expanded narrow mode,
                    data bus drivers (no 16-bit, 6811, DRAM, parity check),
                    Address translation, paged memory
11, 12     Analog Circuits, amplifiers, ADC, DAC, data acquisition systems
                     both +5V single supply and +12/-12V dual supply op amps, AD620
11.9, 15  Digital filters implementations, multiple access circular queue 
Guarantees
       Memory interface: timing analysis, diagrams, design, CS initialization
       Data acquisition systems
       Analog circuits

STUDY GUIDE Final (Quiz 1 and Quiz 2 stuff plus the following)
Lab Important Topics
26. Pulse width modulation, transistor interfaces, back EMF, MOSFETs
      Period measurement, sensor interfacing, hardware to convert analog to digital
      Control system, either PID or Fuzzy, periodic interrupts, discrete derivative
Chapter Topic
3, 4       Choosing between real time, gadfly, interrupts, periodic polling, DMA
6           Input capture, period measurement, pulse width measurement
6           Output compare, pulse-width modulation, frequency measurement
8.4, 8.5 6N139 isolation, solenoids, DC motors, back EMF
10         DMA concepts, single vs. dual cycle, block (burst) vs. cycle steal, 
                  software synchronization, bandwidth, latency, address increment, 
                  block size, autoinitialization (reloads parameters and loops continuously)
13        Control Systems, open loop, closed loop, 
                  PID implementations, Fuzzy Logic design and implementation
Guarantees
        Control system implementation
        Multiple source interrupts with synchronization
        Input capture or output compare: period or pulse width measurement
        Memory interface: timing analysis, diagrams, design, CS initialization
        Analog circuits
        Input capture or output compare: measurement or signal generation

Curious about my research? See
http://www.ece.utexas.edu/~valvano/research