Busy-wait, 
interrupt, DMA, periodic polling, priority interrupts    Timing 
equations, timing diagrams,     Address 
translation and extended mode    Serial
  network protocols, layered software, USB 
    Foreground 
and background thread scheduling     Synchronization 
using spinlock and blocking semaphores     Interthread
  communication    Diodes,
  transistors, DC motors, servos, stepper motors, relays, solenoids, 
    Optical 
sensors and optical isolation    Input 
capture/output compare, frequency, period and pulse width measurements, 
    Pulse-width 
modulation    Op 
amp amplifiers, DAC, ADC, Thread 
scheduling, digital filters    Open 
loop and closed loop, Linear and Nonlinear,     Bang-bang, 
incremental, PID, Fuzzy Logic Control    15% 
	Quiz1, Friday February 27, 10-10:50am, in ACA1.104 ***DATE CHANGE***    15% 
	Quiz2, Friday April 17, 10-10:50am, in ACA1.104 ***DATE CHANGE***    30% 
Final, Thursday, May 14, 2-5pm, regularly scheduled        6A. 
	Motor interface and PID control       6B. 
	Steering, and sensor design and interfacing        6C. 
Control algorithm, system performance analysisNo lab 1/20
New Lab Schedule
| Week | Monday Lab | Wednesday Lab | Friday 10am | Comments | 
| 1/19 | none | none | no lab activities | |
| 1/26 | Meet the TA | partners chosen | Metrowerks demonstration | |
| 2/2 | 1f Prep | 1f Demo | 1f Report | Spectrum analyzer demo | 
| 2/9 | 
 | 2h Prep | 
 | 
 | 
| 2/16 | 2h Demo | 3g Prep | 2h Report | |
| 2/23 | 
 | 
 | Quiz1 | quiz 1 is 2/27 | 
| 3/2 | 3g Demo | 4i Prep | 3g Report | Demo 9S12-USB output | 
| 3/9 | 4i Part Demo | 
 | 
 | 
 | 
| 3/23 | 4i Demo | 5h Prep | 4i Report | 
 | 
| 3/30 | 5h Part Demo | 
 | 
 | 
 | 
| 4/6 | 5h Demo | 6A Prep | 5h Report | 
 | 
| 4/13 | 
 | 
 | Quiz2 | quiz 2 is 4/17 | 
| 4/20 | 6A Demo | 6B Prep | 6A Report | 
 | 
| 4/27 | 6B Demo | 6C Prep | 6B Report | 
 | 
| 5/4 | 
 | 6C Demo | 6C Report | Turn in equipment by 5/8 | 
Prep = you turn in your lab preparation 
		Demo = you demonstrate your lab to the TA
		Partial = you demonstrate first part of a two-week lab to the TA
		Report = you turn in your complete lab report to the TA
		 
| Date | Chapter | Topic | 
| 1/21 | 2, 4, 7 | view01, Modular programming, call graphs, flow charts, data
        flow graphs, show differences between SCI12.C and SCI12A.C, Metrowerks compiler, device drivers, quality software, friendly | 
| 1/26 | 2, 4, 6 | view02, Lab environment, 
		9S12 debugging techniques,
        intrusiveness, monitor, output to scope, TExaS
        simulator, real time | 
| 1/28 | 7, 11 | view03, PLL, OC interrupts,
        SPI 
		interface, EEPROM, file system  | 
| 2/2 | 11, 12 | view04, 
		microphone interface, rail-to-rail single supply circuits  | 
| 2/4 | 11 | view05, ADC 
		software, data acquisition systems  | 
| 2/9 | 14 | view06, Controller area network, FIFO queue | 
| 2/11 | 
        14 | view06, | 
| 
		 | 15 | view07, 
		Digital filters, Z transform, fixed point implementation, effect of 
		sampling jitter | 
| 2/18 | 14 | view08, USB | 
| F 2/27 | 
 | Quiz 1 in ACA 1.104, covering material in Labs 1, 2, digital filters | 
| 2/23 |  | view09, Visual C++ example | 
| 2/25 | 
 | view10, FFT, 
		graphics | 
| 3/2 | 5, 6 | view11, 
		threads, TCB switching,
        run Lab17.c on TExaS Spinlock semaphores, draw initial TCB, performance
        measures (response time, throughput) | 
| 3/4 | 5 | Debugging using output pins, Blocking semaphores,
        use of the FIFO, and thread communication, add cooperative multitasking
        to Lab17os.c | 
| 3/6 | 5 | view12, Blocking semaphores, priority scheduling | 
| 3/9 | 5 | view13 OS | 
| 3/11 | 8 | view14, Transistor interfaces (TIP120, L293, IRF540),
        optical isolation, motor interfacing | 
| 3/25 | 6 | view15, Pulse width modulation, using output compare, Input capture | 
| 3/30 | 
 | |
| 4/1 | 
 | |
| 4/6 | 6 |  | 
| 4/8 | view18, 
         | |
| 4/13 | 
 | 
		 | 
| 4/15 | Guest lecture from Silicon Labs | |
| F 4/17 | Quiz 2 in ACA 1.104, covering material in Labs 1, 2, 3, 4, 5 | |
| 4/20 | new | viewxx, Arm architecture | 
| 4/22 | 
		new | viewxx, Arm 
		I/O systems | 
| 4/27 | new | viewxx, Real-time operating systems | 
| 4/29 | new | viewxx, MicroC/OS-II | 
| 5/4 | 
 | course review and evaluation | 
| 5/6 |   | Robot demonstrations in ENS lobby | 
| F 5/8 |   | all Lab notebooks are due to the TA at 12 noon | 
| F 5/8 |   | Turn in Lab Equipment so that we won't bar your
        registration | 
| 5/14 |   | Final exam, Thursday, 2-5pm, Room
        regularly scheduled | 
     No 
lab activities occur during the week of January 19.  During the week of January 
26-28, please go to your scheduled lab sessions in ENS252C to get a 
demonstration of the lab equipment.  Either the TechArts 9S12C32 or 
9S12DP512 board will suffice for EE345M. It will be extremely convenient for 
both partners to have a 9S12 board. If you did not get either a TechArts 9S12 kit in EE319K, then a kit will be 
		given to you. Each student will get exactly one kit. If you loose it or 
		destroy it, you can purchase another from Technological Arts (see
http://users.ece.utexas.edu/~valvano/S12C32.htm).  For more information on purchasing a replacement kit, go 
		to the 
		
		http://www.technologicalarts.com/  web site and order NC12C32SP 
or UTA-kit2. Lab partners will be selected 
		in your lab the week of January 26-28. The Lab 1 preparation is due at the 
		beginning of your first lab session the week of February 2.  The lab 
		preparations (hardware diagrams and syntax-free software source code 
		printouts) are due at the beginning of your lab period. In other words, 
		please type your software into the PC before lab. Attendance in lab is 
		required. All software for lab, and tests must include comments. All 
		hardware must include R&C values specifying tolerance and type (e.g., 5% 
		carbon), and TTL chip numbers (be very specific e.g., 74LS00). Pin 
		numbers are required only for lab, not for the exams. 
		    Students are encouraged to go to the last 1 hour of the other lab 
		periods, but the first priority will be to the regular students. During 
		the first 15 minutes of lab, the TA will collect preparations. For the 
		next 15 minutes, the TA will lead a lab discussion session. The 
		remaining lab time is available for debugging and lab checkout. At the 
		end of the semester please verify with the checkout counter that your 
		record is clear. All reports must be given to the TA by Friday May 8, 5pm.
		
Sections from the book required to perform the labs
1.6. 
Digital Logic And Open Collector
2.11. Debugging Strategies
4.5.4. 6812 Interrupt Vectors And Priority (Review)
7.6. SCI
Interrupt Interfaces
7.7. SPI Interfaces
Lab Example SCI12.H SCI12A.C (Review)
8.4. Transistors 
Used For Computer Controlled Current Switches 
8.5.5. Pulse Width Modulated 
DC Motors
8.5.6. Interfacing EM Relays, Solenoids, And DC Motors
Figure 
8.70 (IRF540, 6N139)
6.2.1. General Concepts
6.2.2. Output Compare Details 
6.2.3. Periodic Interrupt Using Output Compare (Review) 
6.2.5. Pulse 
Width Modulation 
6.1.1 Basic Principles Of Input Capture 
6.1.2. Input 
Capture Details 
6.1.3. Real Time Interrupt Using An Input Capture 
6.1.4. 
Period Measurement (Not 32-Bit) 
6.4.1. Using Period Measurement To Calculate 
Frequency 
5. Threads (6812, but not 6811) 
14.1., 14.3(2nd edition) CAN Network 
15. Digital filter fundamentals, 
design, implementation and analysis
Covered on the 
exams, but not necessary for the labs
6.1.5. Pulse Width Measurement 
6.3. Frequency Measurement 
6.3.1. Frequency Measurement Concepts 
6.3.2. Frequency Measurement with frequency resolution of 100Hz 
6.5. 
Measurements Using Both Input Capture And Output Compare 
6.5.1. Period 
Measurement with period resolution of 1ms 
6.5.2. Frequency Measurement with 
frequency resolution of 0.1Hz 
9.7.5. 
Extended Address Data Page Interface To The MC68HC812A4
11.2.7.5 Subtraction Circuits 
11.2.7.6 Instrumentation Amp (AD620)
 
Legal Stuff: The 12th class day is January 
		30. 
		After this date, I will sign a drop only if the Dean approves it. Your 
		current grade status must be a "C" or better for you to receive a "Q". 
		Course evaluation is conducted on the last class day in accordance with 
		the Measurement and Evaluation Center form. The final exam is at the 
		time and place stated in the course schedule. The University of Texas at 
		Austin provides upon request appropriate academic adjustments for 
		qualified students with disabilities. For more information, contact the 
		Office of the Dean of Students with Disabilities at 471-6259, 471-4241 TDD.
Cheating: Cheating is very uncivilized behavior and is 
to be avoided at all cost. We will be using an automated system to check for software plagiarism. You are allowed to talk to your classmates about the 
lab assignments, but you are NOT allowed to look at each other's 
written work. Oral discussion about an assignment is 
encouraged and is not considered to be cheating. Copying of any part 
of a program is cheating without explicit reference to its source. If we find 
two programs that are copied, there will be a substantial penalty to both 
students, e.g., failure in the course. Students who cheat on tests or in lab 
will fail. Prosecution of cases is very traumatic to both the student and 
instructor. PLEASE DO YOUR OWN WORK. Policies concerning the use of other 
people's software in this class:    … 
I strongly encourage you to study existing software.    … 
All applications and libraries must be legally obtained. E.g.,        You 
may use libraries that came when you bought a compiler.        You 
may use software obtained from a BBS or on the WWW.        You 
may copy and paste from the existing source code.     … 
You may use any existing source code that is clearly referenced and 
categorized:        original: 
completely written by you,        derived: 
fundamental approach is copied but it is your implementation,        modified: 
source code significantly edited to serve your purpose,        copied: 
source code includes minor modifications.
        Request samples (DIP or PDIP package) 
        You will need register with an official University email address (e.g., 
        YourName@mail.utexas.edu) rather than 
        a junk email address (e.g., aol.com or gmail.com) 
        for
          Analog Devices
		
        http://www.analog.com/en/index.html 
 1) AD8032ANZ  
		rail-to-rail op amp
        
        
		
        Maxim  
        
        http://www.maxim-ic.com/  
        
        (with or without
        
        +)
        
        
		
        1) 
        
        MAX1247ACPE+ 
        
        12-bit ADC (A or B, with or 
		without
        
        +)
        
        
        
        
        2) MAX6225ACPA+  2.500V 
		analog reference 
        (ACPA or BCPA)
        
        3a) 
        MAX5154ACPE
        
        dual 12-bit SPI interface DAC 
        
        (ACPE or BCPE)
        or 3b) MAX539ACPA 
		single 12-bit SPI interface DAC 
		
        
        (ACPA or BCPA)
        
        
        Texas Instruments 
        http://www.ti.com  (with or without 
A)
1)
INA122P rail-to-rail instrumentation amp
2) OPA2350PA rail-to-rail dual op amp 
3) TLC2272ACP rail-to-rail dual op amp
4) TLC2274ACN rail-to-rail quad op amp 
Places to buy prototyping boards 
and other parts
In Austin
| AlTex Electronics | 832-9131 | 
| Frys Electronics | 733-7000 | 
| Howard Electronics | 837-2525 | 
Mail Order
| BG Micro, Dallas | http://www.bgmicro.com/ | Freescale | http://www.freescale.com/ | |
| All Electronics, Los Angeles | http://www.allelectronics.com/ | Technological Arts | http://www.technologicalarts.com | |
| Digikey | http://www.digikey.com/ | Maxim | http://www.maxim-ic.com/ | |
| Mouser Electronics | Fairchild | http://www.fairchildsemi.com/ | ||
| Jameco, Belmont CA | http://www.jameco.com/ | Texas Instruments | http://www.ti.com/ | 
Curious about my research? 
See
http://users.ece.utexas.edu/~valvano/research