EXAM STUFF

Here is the detailed course descriptor, with a breakdown of prerequisites, lectures, grading policy, test dates, etc. Here are three questions that you can use to check if you are ready for the class.

Please fill out this small bio; it really helps me get to know the class better.

• Class Notes

  I will use, with minor modifications, the excellent notes prepared by David Harris to accompany the text. I've listed the corresponding sections of the book, but you should read more broadly. In particular, I would like you to pay particular emphasis to the "Pifalls and Fallacies" section concluding each chapter.
  • Introduction (1.1-1.3)
  • CMOS Fabrication and its implications (1.3, 3.1-3.5)
  • Elementary CMOS logic design and layout (1.4-1.5.5)
  • MOS Device Equations (2.1-2.3.1)
  • CMOS Logic: Quantiative Analysis (2.3.2-2.6, 4.2)
  • Logical Effort (4.3)
  • Combinational Logic (6.1-6.2.1)
  • Interconnect (4.5-4.6)
  • Circuit Families (6.2.2-6.2.5, 6.4-6.6)
  • Adders (10.1-10.2)
  • Sequential Design (7.1-7.5)
  • SRAMs (11.1-11.2)
  • CAMs, ROMs, and PLAs (11.4-11.7)
  • Datapath (10.3-10.10)
  • MOS Devices in DSM (2.4)
  • Circuit Pitfalls (6.3)
  • Low Power (6, with an emphasis on 6.5)
  • Test (4.8, 9)
  • Design for Skew (7.5-7.6, 12.5)
  • Packaging, Power Supplies, and I/O (12.2-12.4)
  • Scaling and Economics (4.9, and 8.5)
  • Evolution of Intel processors
  • Review

• Teaching Assistants

  • Jiseon Park, jpark AT ECE - utexas DOT edu; Eric Quinnell, quinnell at ECE - utexas DOT edu; Diptendu Ghosh, dghosh AT ECE - utexas DOT edu (You can email all the TAs by sending mail to vlsi-ta !at# ece utexas edu_NOSPAM.)
  • Office Hours Mon - Tue - Wed Jiseon 8pm-10pm LRC Thu Jiseon 8pm-10pm LRC Fri Diptendu 10am-noon LRC Sat - Sun Diptendu, Eric 6pm-midnight LRC -->

• Homework

  Diptendu Ghosh is maintaining the homeworks here. Some common issues arising in office hours.

• Sample midterms

  • Midterm 1
  • Midterm 2

• Design projects

  • Layout
  • ALU design
    • Top 10 problems
  • Verification
    • Top 10 problems

  • Resources

    • Bulletin board for CCMOS VLSI discussion
    • Themicrowind software that we'll be using for HWs
    • Errata for the book here
    • Read about the latest trends in VLSI design at EE Times; Deepchip.com is a great resource for VLSI CAD. The verification guild focuses on design verification.
    • Steve Rubin's Electric is a nice public domain tool for VLSI design. He re-wrote it in Java recently, and it runs nicely on Windoze.
    • Document viewing:
      • Use Aladdin Ghostscript to view postscript on Win95/WinNT.
      • Use Adobe Acrobat to view pdf files; you can download Acrobat here
      • You can convert Postscript to PDF via ps2pdf
    • The ECE Learning Resource Center.
    • Getting started with UNIX, vi, g++, gdb.