Date: Sat, 22 Sep 2007 02:05:41 -0700
From: Renu Mehra Renu dot Mehra at synopsys com lyx qws
                                                                                                  
Company: Synopsys
                                                                                                  
Job Title: Power Compiler R&D
                                                                                                  
The candidate will work with Power Compiler R&D team to implement power
management and power-driven synthesis capabilities. We are looking at a
large variety of optimization techniques including synthesis, clock
gating and advanced adaptive voltage and frequency scaling. The
candidate will also have to support the existing functionality and
continually strive to improve the quality and maintainability of the
software. The work will require algorithm, data structure design as well
as developing robust and efficient implementations. The engineer is
expected to specify, design, implement and test in a large and complex
software development environment.
                                                                                                  
The candidate should have strong C/C++ programming and UNIX skills along
with excellent problem solving and algorithm development skills.
Familiarity with Perl, Tcl and other scripting languages is desired. The
candidate must be familiar with software development process, debugging
tools and configuration management tools. Prior experience and education
in synthesis, EDA optimization algorithm, and low power synthesis is a
plus. MS EE/CS with 5+ yrs related working experience or Ph.D EE/CS with
3+ yrs of experience.