EE338L Homework 1

Due Thursday 2/1

 

Use the following parameters

NFET: Vt=0.5V, kp=100uA/V2, l=0.05 1/V

PFET: Vt=-0.5V, kp=40uA/V2, l=0.05 1/V

 

1) Determine the operating region and calculate the current ID.

I assume W/L=10 (was not explicitly stated, if you assumed different it is ok

a) PFET, VS=VB=3V, VD=1V, VG=2V

-VGS=2V>0.5V -VGD=-1V<0.5V, saturation

ID=kp/2*W/L*(Vgs-VT)2*(1+l*VDS)=55uA

b) PFET, VS=VB=VG=3V, VD=1V

VGS=0<0.5V off

ID=0A

c) PFET, VS=VB=3V, VG=2V, VD=0V

-VGS=1V>0,5V, -VGD=-2V<).5V saturation

ID=kp/2*W/L*(Vgs-VT)2*(1+l*VDS)=57.5uA

d) NFET, VS=VB=0V, VG=3V, VD=0.5V

VGS=3V>0.5V VGD=2.5V>0.5V ohmic

ID=kp*W/L*((Vgs-VT)*Vds-Vds2/2))=1125uA

e) NFET, VS=VB=0V, VG=1V, VD=1V

VGS=1V>0.5V VGD=0V<0.5V saturation

ID=kp/2*W/L*(Vgs-VT)2 *(1+l*VDS)=131.25uA

 

 

2) Calculate the resistance of this n device: W=10um, L=1um

VG=3V, VS=0V, VDS is small, VB=0V

Ohmic region, VDS is small so I neglect VDS2/2 term

ID=kp*W/L*(VGS-VT)*VDS

R=VDS/ID=1/kp*L/W*1/(VGS-VT)=400W

 

3) Design a 10kOhm resistor and calculate the parasitic capacitance

a) in polysilicon, min width .5um, Rsq=40 Ω/□, Ca=0.100fF/um2, Cp=0.1fF/um

Number of squares required: 10000/40=250. Therefore choose W=Wmin=0.5um, L=250*0.5um=125um.

Parasitic cap Cpar=Ca’*W*L+ Cp’*(2W+2L)

Cpar=.1fF*(.5*125)+.1fF*(1um+250um)=31.35fF

 

b) in p-diffusion, min width 1um, Rsq=100 Ω/□, Ca=0.400fF/um2, Cp=0.4fF/um

Number of squares required: 10000/100=100. Therefore choose W=Wmin=1um, L=100*1um=100um.

Parasitic cap Cpar=Ca’*W*L+ Cp’*(2W+2L)

Cpar=.4fF*(1*100)+.4fF*(2um+200um)=120.8fF

 

 

c) using a p-device with Vgs=3V

 

Cad’=Cas’=0.4fF/ um2,

Cpd’=Cps’=0.4fF/um

Cox’=2.4fF/ um2,

Coverlap= 0.2fF/um

Cgb’=0.1fF/ um2,

Minimum gate width 0.5um, minimum gate length 0.5um, minimum drain and source dimension 1um

 

R=VDS/ID=1/kp*L/W*1/(VGS-VT)

L/W=R*kp*(Vgs-VT)=10000*40*2.5=1

Choose L=Lmin and W=Wmin =0.5um

Cox=.5*.5*2.4fF=.6fF

Coverlap=0.2fF*.5=0.1fF for gd and gs each

Drain and Source are each 0.5um*1um, so Ca=.4fF*.5=0.2fF and Cp=.4fF*3=1.2fF

There is no gate bulk capacitance in ohmic

Total cap: Ctot=.6+.1+.1+.2+.2+1.2+1.2=3.6fF

Cgs=Cgsoverlap+Cox/2=.4fF

Cgd=Cgs

Cdb=Cp+Ca=1.4fF

Csb=Cdb

Cgb=0