VHDL93 is more of a refinement of VHDL87 in that some ambiguities in VHDL87 were resolved in VHDL93. A few extra features were added and no features removed. For example, changes in VHDL93 include groups, shared variables, inclusion of foreign models in a VHDL description, operators, support of pulse rejection by a modified delay model, signatures, report statement, basic and extended identifiers, and more syntactic consistency. VHDL93 is more or less a superset of VHDL87.
In talking with Mike Williamson of the Ptolemy Project, the inclusion of foreign models in a VHDL description was one the most significant improvements. This improvement was key in getting Ptolemy to interface with VHDL simulation tools. Some commercial tools went ahead and had such interfaces before the 93 standard, but now that it is in there, it is more likely that simulators will be able to work together with other tools.
New releases of VHDL tools are beginning to support VHDL93. Since most of the language is untouched by VHDL93, the vast majority of vendors should support VHDL93 soon. Also, synthesis tools do not accept many of the language features that changed, so they are less affected by the 93 update. By now, Mike believes that the major vendors like Synopsys and Cadence support VHDL93.
VHDL93 was not concerned about support analog extensions to VHDL. Analog extensions to VHDL are being considered by the AHDL 1076.1 Working group: "The purpose of 1076.1 Working Group (WG) is to develop analog extensions to VHDL, i.e. to enhance VHDL such that it can support the description and simulation of circuits that exhibit continuous behavior over time and over amplitude. As of summer 1993 the IEEE Computer Society, through its Standards Activity Board (SAB), has approved the 1076.1 WG under PAR1076.1." Well, the AHDL committee did not present its findings in 1993, 1994, or 1995.
For more information, see the Frequently Asked Questions for the comp.lang.vhdl news group which can be found at http://vhdl.org/vi/comp.lang.vhdl/.