Given a single appearance schedule, we can reduce the buffer memory requirements by factoring out common factors in a schedule or loop. For example, (3(4A)(2B)) requires one-third of the buffering required by ((12A)(6B)) but also requires three times the loop initialization code. On a digital signal processor, the cost of a loop initialization is usually one pipeline flush. The key observation is that non-coprime schedules or loops result in higher buffer memory requirements than their factored counterparts. The schedule loops (3(4A)(2B)) and (10(7C)) are non-coprime since we could factor them into (6(2A)B) and (70C), respectively. The looped schedule (6AB)(3C) is non-coprime whereas (2A)(3B) is coprime. [Bhattacharyya, Murthy, Lee; pp. 70 and 82]
Note that reverse factoring may not yield an admissible schedule. Consider the homogeneous SDF graph with two nodes A and B shown in Figure 1 below. For this graph, (10AB) is a valid single appearance schedule; however, the reverse factored schedule (10A)(10B) terminates on the second invocation of A because there would be no tokens available on the input of A. [Bhattacharyya, Murthy, Lee; pp. 71] The same problem can exist in acyclic graphs, as shown in Figure 2.
-------------
| |
| 1 v 1
---- ----
| A | | B |
| | | |
---- ----
^ 1 | 1
| |
----- D -----
Figure 1: An example used to illustrate that reverse factoring is
not always valid for single appearance schedules for non-acyclic graphs.
The D on the feedback arc represents one token of delay.
Reverse factoring the schedule (10 AB) yields (10 A)(10 B), which
is not a valid schedule.
[Figure 4.8 in Software Synthesis from Dataflow Graphs]
---- 2 1 ---- 1 1 ---- | | | | | | | A | -------> | B | -- D --> | C | | | | | | | ---- ---- ----Figure 2: An example used to illustrate that reverse factoring is not always valid for single appearance schedules for acyclic graphs. The D on the B-C arc represents one token of delay. Reverse factoring the schedule A (2 C B) yields A (2 C)(2 B), which is not a valid schedule.