Hardware/Software Codesign

One approach to hardware/software codesign is cosynthesis from the point of view of logic/behavioral synthesis research. Two example environments are Vulcan from Stanford University and POLIS from the University of California at Berkeley.

The key hypothesis in hardware/software codesign is that the entire system can be modelled consistently. Research areas include:

Vulcan

Vulcan uses as its specification language HardwareC. HardwareC is threaded, imperative, and timed. It supports both blocking and non-blocking, reads and writes. It represents a system using a hierarchical control/dataflow graph--- these graphs are acyclic graphs with explicit synchronization mechanisms for the beginning and ending of each subsystem. The flow graps consist of cond, join, operation, input/output, wait, and link (either call or loop). The three timing properties of operation delay, latency, and rate of execution, can be fixed, variable, or unbounded. Execution delay may be variable and unbounded for links (calls and loops). Only one source node and one sink node for a system or subsystem, and they have a delay of zero.

Non-deterministic delays must be handled by a run-time scheduler. Source node is an anchor. An anchor serves as a reference for execution time. A non-deterministic delay is also an anchor. Vulcan constructs a static schedule for each anchor.

Timing constraints include operation delay and execution time. Execution times are placed on the arcs. Feedback arcs specify minimum delay constraints, and feedforward arcs specify maximum delay constraints. A problem arises when a non-deterministic opertor is on a cycle. Minimum rate is determined by the maximum delay, and the maximum rate is determined by the minimum delay.

The target architecture is a microcontroller architecture plus ASIC + shared memory + one processor + shared bus. In the Vulcan system, the hardware model is handled by the Olympus tool. For the software model, Vulcan makes threads convex-- only one single entry and one single exit point for each operation.


Updated 04/07/98.