Jianlan Song and Qian Wang, "Modeling and Real-Time Embedded Implementation of an H.263+ Decoder"
This is a semester project to implement H.263+ decoder on the TMS320C54 DSP. H.263+ is the version 2 of H.263 standard. It's an extension of H.263 which providing twelve new negotiable modes. These modes improve compression performance, allow the use of scalable bit stream, enhance performance over packet-switched networks, support custom picture size and clock frequescy and provide supplemental display and external usage capabilities. We are going to implement H.263+ decoder on C54 DSP.