/*****************************************************************************/
/*  (C) Copyright 1997,1998 by DNA Enterprises, Inc.                         */
/*  All rights reserved                                                      */
/*****************************************************************************/
/*  PCI.H - S5933 PCI Controller Driver Routines Header                      */
/*                                                                           */
/*     This module provides routines which configure, control and perform    */
/*     command and data transfers between the host (PCI side) and the add-on */
/*     interface (C6x side).                                                 */
/*                                                                           */
/*  MACRO FUNCTIONS:                                                         */
/*     None.                                                                 */
/*                                                                           */
/*  FUNCTIONS:                                                               */
/*      pci_driver_init()       - initializes the driver                     */
/*      pci_fifo_open()         - opens a channel to the PCI FIFO device     */
/*      pci_fifo_close()        - closes a previously opened channel         */
/*      pci_fifo_send()         - try to send data to the FIFO               */
/*      pci_fifo_async_send()   - begins an asynchronous FIFO send operation */
/*      pci_fifo_sync_send()    - sends data to the FIFO                     */
/*      pci_fifo_receive()      - try to receive data from the FIFO          */
/*      pci_fifo_async_receive() - begins an asynchronous FIFO receive       */
/*      pci_fifo_sync_receive() - retrieves data from the FIFO               */
/*      pci_message_send()      - try to send a 32bit message to the host    */
/*      pci_message_async_send() - begins a send message operation           */
/*      pci_message_sync_send() - send a 32bit message to the host           */
/*      pci_message_retrieve()  - try to retrieve a message from the host    */
/*      pci_message_async_retrieve() - begins an asynchronous message retriev*/
/*      pci_message_sync_retrieve() - retrieve a 32bit message               */
/*      amcc_nvram_read()       - reads a byte from NVRAM                    */
/*      amcc_nvram_write()      - write a byte of data to NVRAM              */
/*      amcc_mailbox_read()     - try to read a mailbox register             */
/*      amcc_mailbox_write()    - try to write to a mailbox register         */
/*      pci_base_addr           - Determines PCI controller base address     */
/*                                                                           */
/*  GLOBAL VARIABLES                                                         */
/*    pciBaseAddr        - C6x base address of PCI controller registers      */
/*    pciFifoAddr        - C6x base address of PCI controller FIFOs          */
/*                                                                           */
/*****************************************************************************/
#ifndef _PCI_H_
#define _PCI_H_

/*---------------------------------------------------------------------------*/
/* INCLUDES                                                                  */
/*---------------------------------------------------------------------------*/

/*---------------------------------------------------------------------------*/
/* DEFINES AND MACROS                                                        */
/*---------------------------------------------------------------------------*/
#define PCI_MAP0_BASE_ADDR    0x01300000
#define PCI_MAP0_FIFO_ADDR    0x01310000
#define PCI_MAP1_BASE_ADDR    0x01700000
#define PCI_MAP1_FIFO_ADDR    0x01710000

/* AMCC S5933 PCI Controller Add-on Register Offsets                         */
#define AMCC_AIMB1_OFFSET   (0x00)  /* Add-On Incoming Mailbox 1 register    */
#define AMCC_AIMB2_OFFSET   (0x04)  /* Add-On Incoming Mailbox 2 register    */
#define AMCC_AIMB3_OFFSET   (0x08)  /* Add-On Incoming Mailbox 3 register    */
#define AMCC_AIMB4_OFFSET   (0x0c)  /* Add-On Incoming Mailbox 4 register    */
#define AMCC_AOMB1_OFFSET   (0x10)  /* Add-On Outgoing Mailbox 1 register    */
#define AMCC_AOMB2_OFFSET   (0x14)  /* Add-On Outgoing Mailbox 2 register    */
#define AMCC_AOMB3_OFFSET   (0x18)  /* Add-On Outgoing Mailbox 3 register    */
#define AMCC_AOMB4_OFFSET   (0x1C)  /* Add-On Outgoing Mailbox 4 register    */
#define AMCC_AFIFO_OFFSET   (0x20)  /* Add-On FIFO Port                      */
#define AMCC_MWAR_OFFSET    (0x24)  /* Bus Master Write Address Register     */
#define AMCC_APTA_OFFSET    (0x28)  /* Add-On Pass Through Address           */
#define AMCC_APTD_OFFSET    (0x2C)  /* Add-On Pass Through Data              */
#define AMCC_MRAR_OFFSET    (0x30)  /* Bus Master Read Address Register      */
#define AMCC_AMBEF_OFFSET   (0x34)  /* Add-On Mailbox Empty Full Status      */
#define AMCC_AINT_OFFSET    (0x38)  /* Add-On Interrupt Control              */
#define AMCC_AGCSTS_OFFSET  (0x3C)  /* Add-On General Control Status         */
#define AMCC_MWTC_OFFSET    (0x58)  /* Bus Master Write Transfer Count       */
#define AMCC_MRTC_OFFSET    (0x5C)  /* Bus Master Read Transfer Count        */


/* AMCC AINT register defines */
#define AMCC_AINT_INT_ASSRTD_BIT    (23)    /* Interrupt asserted status     */
#define AMCC_AINT_INT_ASSRTD_MASK   (1<<AMCC_AINT_INT_ASSRTD_BIT)
#define AMCC_AINT_INT_BMERR_BIT     (21)    /* Bus master error int status   */
#define AMCC_AINT_INT_BMERR_MASK    (1<<AMCC_AINT_INT_BM_BIT)
#define AMCC_AINT_INT_BIST_BIT      (20)    /* BIST interrupt status         */
#define AMCC_AINT_INT_BIST_MASK     (1<<AMCC_AINT_INT_BIST_BIT)
#define AMCC_AINT_INT_RTRANS_BIT    (19)    /* Read transfer int status      */
#define AMCC_AINT_INT_RTRANS_MASK   (1<<AMCC_AINT_INT_RTRANS_BIT)
#define AMCC_AINT_INT_WTRANS_BIT    (18)    /* Write transfer int status     */
#define AMCC_AINT_INT_WTRANS_MASK   (1<<AMCC_AINT_INT_WTRANS_BIT)
#define AMCC_AINT_INT_OMB_BIT       (17)    /* Outgoing mailbox int status   */
#define AMCC_AINT_INT_OMB_MASK      (1<<AMCC_AINT_INT_OMB_BIT)
#define AMCC_AINT_INT_IMB_BIT       (16)    /* Incoming mailbox int status   */
#define AMCC_AINT_INT_IMB_MASK      (1<<AMCC_AINT_INT_IMB_BIT)

#define AMCC_AINT_ENA_RTRANS_BIT    (15)    /* Read transfer int enable      */
#define AMCC_AINT_ENA_RTRANS_MASK   (1<<AMCC_AINT_ENA_RTRANS_BIT)
#define AMCC_AINT_ENA_WTRANS_BIT    (14)    /* Write transfer int enable     */
#define AMCC_AINT_ENA_WTRANS_MASK   (1<<AMCC_AINT_ENA_WTRANS_BIT)
#define AMCC_AINT_ENA_OMB_BIT       (12)    /* Outgoing mailbox int enable   */
#define AMCC_AINT_ENA_OMB_MASK      (1<<AMCC_AINT_ENA_OMB_BIT)
#define AMCC_AINT_ENA_IMB_BIT       (4)     /* Incoming mailbox int enable   */
#define AMCC_AINT_ENA_IMB_MASK      (1<<AMCC_AINT_ENA_IMB_BIT)


/* AMCC AGCSTS register defines */
#define AMCC_AGCSTS_TC_ENA_BIT      (28)    /* Transfer count enable         */
#define AMCC_AGCSTS_TC_ENA_MASK     (1<<AMCC_AGCSTS_TC_ENA_BIT)
#define AMCC_AGCSTS_RST_MB_BIT      (27)    /* Reset mailbox flags           */
#define AMCC_AGCSTS_RST_MB_MASK     (1<<AMCC_AGCSTS_RST_MB_BIT)
#define AMCC_AGCSTS_RST_IN_FIFO_BIT (26)    /* Reset PCI to add-on FIFO flags*/
#define AMCC_AGCSTS_RST_IN_FIFO_MASK (1<<AMCC_AGCSTS_RST_IN_FIFO_BIT)
#define AMCC_AGCSTS_RST_OUT_FIFO_BIT (25)   /* Reset add-on to PCI FIFO flags*/
#define AMCC_AGCSTS_RST_OUT_FIFO_MASK (1<<AMCC_AGCSTS_RST_OUT_FIFO_BIT)
#define AMCC_AGCSTS_WTC_ZERO_BIT    (7)     /* Write trans count == 0 status */
#define AMCC_AGCSTS_WTC_ZERO_MASK   (1<<AMCC_AGCSTS_WTC_ZERO_BIT)
#define AMCC_AGCSTS_RTC_ZERO_BIT    (6)     /* Read trans count == 0 status  */
#define AMCC_AGCSTS_RTC_ZERO_MASK   (1<<AMCC_AGCSTS_RTC_ZERO_BIT)
#define AMCC_AGCSTS_IN_FIFO_MT_BIT  (5)     /* PCI to add-on FIFO empty      */
#define AMCC_AGCSTS_IN_FIFO_MT_MASK (1<<AMCC_AGCSTS_IN_FIFO_MT_BIT)
#define AMCC_AGCSTS_IN_FIFO_NHFL_BIT (4)    /* PCI to add-on FIFO half empty */
#define AMCC_AGCSTS_IN_FIFO_NHFL_MASK (1<<AMCC_AGCSTS_IN_FIFO_NHFL_BIT)
#define AMCC_AGCSTS_IN_FIFO_FULL_BIT (3)    /* PCI to add-on FIFO full       */
#define AMCC_AGCSTS_IN_FIFO_FULL_MASK (1<<AMCC_AGCSTS_IN_FIFO_FULL_BIT)
#define AMCC_AGCSTS_OUT_FIFO_MT_BIT  (2)    /* Add-on to PCI FIFO empty      */
#define AMCC_AGCSTS_OUT_FIFO_MT_MASK (1<<AMCC_AGCSTS_OUT_FIFO_MT_BIT)
#define AMCC_AGCSTS_OUT_FIFO_HFL_BIT (1)    /* Add-on to PCI FIFO half full  */
#define AMCC_AGCSTS_OUT_FIFO_HFL_MASK (1<<AMCC_AGCSTS_OUT_FIFO_HFL_BIT)
#define AMCC_AGCSTS_OUT_FIFO_FULL_BIT (0)   /* Add-on to PCI FIFO full       */
#define AMCC_AGCSTS_OUT_FIFO_FULL_MASK (1<<AMCC_AGCSTS_OUT_FIFO_FULL_BIT)


/* AMCC AMBEF register defines */
#define AMCC_AMBEF_IMB1_RECV_MASK   (0x0000000f)
#define AMCC_AMBEF_IMB2_RECV_MASK   (0x000000f0)
#define AMCC_AMBEF_IMB3_RECV_MASK   (0x00000f00)
#define AMCC_AMBEF_IMB4_RECV_MASK   (0x0000f000)
#define AMCC_AMBEF_OMB1_SEND_MASK   (0x000f0000)
#define AMCC_AMBEF_OMB2_SEND_MASK   (0x00f00000)
#define AMCC_AMBEF_OMB3_SEND_MASK   (0x0f000000)
#define AMCC_AMBEF_OMB4_SEND_MASK   (0xf0000000)


/* function typedefs for callback functions */
typedef void pci_fifo_callback( int  status );
typedef void pci_msg_callback( int  status );




/*---------------------------------------------------------------------------*/
/* GLOBAL VARIABLES                                                          */
/*---------------------------------------------------------------------------*/
extern unsigned int pciBaseAddr;
extern unsigned int pciFifoAddr;

/*---------------------------------------------------------------------------*/
/* FUNCTIONS                                                                 */
/*---------------------------------------------------------------------------*/

/*****************************************************************************/
/*  void pci_driver_init( void )                                             */
/*                                                                           */
/*  This routine initializes the software driver for the PCI FIFO device     */
/*                                                                           */
/*  Parameters:                                                              */
/*  - none                                                                   */
/*                                                                           */
/*  Return:                                                                  */
/*  - none                                                                   */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function MUST be called before using any of the driver calls      */
/*  - this function initializes the local driver information if it has       */
/*    not been initialized previously                                        */
/*                                                                           */
/*****************************************************************************/
void pci_driver_init( void );


/*****************************************************************************/
/*  int pci_fifo_open( void )                                                */
/*                                                                           */
/*  This routine opens a channel of the software driver for the              */
/*  PCI FIFO device                                                          */
/*                                                                           */
/*  Parameters:                                                              */
/*  - none                                                                   */
/*                                                                           */
/*  Return:                                                                  */
/*  - a channel number to reference the device or an ‘invalid’ channel       */
/*      number if the device is already open (an invalid channel number      */
/*      is anything less than 0)                                             */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function                                                          */
/*                                                                           */
/*****************************************************************************/
int pci_fifo_open( void );


/*****************************************************************************/
/*  int pci_fifo_close( int chan )                                           */
/*                                                                           */
/*  This routine closes a previously opened channel.                         */
/*                                                                           */
/*  Parameters:                                                              */
/*  - chan parameter is the channel number from a successful open            */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR, possible error conditions include: chan not       */
/*      open, async operation in progress                                    */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function                                                          */
/*                                                                           */
/*****************************************************************************/
int pci_fifo_close( int chan );


/*****************************************************************************/
/*  int pci_fifo_async_send( int chan, unsigned int *p_buffer,               */
/*      unsigned int num_bytes, pci_fifo_callback *p_callback )              */
/*                                                                           */
/*  This routine begins an asynchronous FIFO send operation.  It returns     */
/*  immediately and the callback function is called when the operation       */
/*  completes.                                                               */
/*                                                                           */
/*  Parameters:                                                              */
/*  - chan parameter is the channel number from a successful open            */
/*  - p_buffer is the location of the data to be written to the FIFO, this   */
/*      address must be 32 bit aligned                                       */
/*  - num_bytes is the number of bytes of data to be written to the FIFO,    */
/*      this number must be a multiple of 4                                  */
/*  - p_callback is the funciton pointer for the callback routine            */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: another send in progress,         */
/*      chan not open, no DMA chan available                                 */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function uses DMA                                                 */
/*  - each individual transfer is 32bits in size so num_bytes must be a      */
/*      multiple of four and p_buffer must be 32bit aligned                  */
/*  - if a close is called during a pending async operation, the operation   */
/*      is aborted and the callback is called with an error status.          */
/*  - only one FIFO send operation is supported at a time, but it can be     */
/*      concurrent with a FIFO receive operation                             */
/*                                                                           */
/*****************************************************************************/
int pci_fifo_async_send( int chan, unsigned int *p_buffer,
                    unsigned int num_bytes, pci_fifo_callback *p_callback );


/*****************************************************************************/
/*  int pci_fifo_sync_send( int chan, unsigned int *p_buffer,                */
/*      unsigned int num_bytes )                                             */
/*                                                                           */
/*  This routine sends data to the FIFO.  It will return when the transfer   */
/*  is complete.                                                             */
/*                                                                           */
/*  Parameters:                                                              */
/*  - chan parameter is the channel number from a successful open            */
/*  - p_buffer is the location of the data to be written to the FIFO, this   */
/*      address must be 32 bit aligned                                       */
/*  - num_bytes is the number of bytes of data to be written to the FIFO,    */
/*      this number must be a multiple of 4                                  */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: chan not open, another send in    */
/*      progress                                                             */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function does not use DMA, it polls the fifo flags and writes     */
/*      data to the fifo directly                                            */
/*  - each individual transfer is 32bits in size so num_bytes must be a      */
/*      multiple of four and p_buffer must be 32bit aligned                  */
/*                                                                           */
/*****************************************************************************/
int pci_fifo_sync_send( int chan, unsigned int *p_buffer,
                       unsigned int num_bytes );

/*****************************************************************************/
/*  int pci_fifo_send( int chan, unsigned int *p_buffer,                     */
/*      unsigned int *p_num_bytes )                                          */
/*                                                                           */
/*  This routine sends data to the FIFO.  It will return when the FIFO is    */
/*  full or the transfer size is satisfied.  The p_num_bytes location will   */
/*  be updated with the actual amount of data transferred                    */
/*                                                                           */
/*  Parameters:                                                              */
/*  - chan parameter is the channel number from a successful open            */
/*  - p_buffer is the location of the data to be written to the FIFO, this   */
/*      address must be 32 bit aligned                                       */
/*  - p_num_bytes is a pointer to the number of bytes of data to be read     */
/*      from the FIFO, this number must be a multiple of 4                   */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: chan not open, another send in    */
/*      progress                                                             */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function does not use DMA, it polls the fifo flags and writes     */
/*      data to the fifo directly                                            */
/*  - each individual transfer is 32bits in size so num_bytes must be a      */
/*      multiple of four and p_buffer must be 32bit aligned                  */
/*                                                                           */
/*****************************************************************************/
int pci_fifo_send( int chan, unsigned int *p_buffer,
                       unsigned int *p_num_bytes );


/*****************************************************************************/
/*  int pci_fifo_async_receive( int chan, unsigned int *p_buffer,            */
/*      unsigned int num_bytes, pci_fifo_callback *p_callback )              */
/*                                                                           */
/*  This routine begins an asynchronous FIFO receive operation.  It returns  */
/*  immediately and the callback function is called when the operation       */
/*  completes.                                                               */
/*                                                                           */
/*  Parameters:                                                              */
/*  - chan parameter is the channel number from a successful open            */
/*  - p_buffer is the location of the data to be written to the FIFO, this   */
/*      address must be 32 bit aligned                                       */
/*  - num_bytes is the number of bytes of data to be written to the FIFO,    */
/*      this number must be a multiple of 4                                  */
/*  - p_callback is the funciton pointer for the callback routine            */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: chan not open, another receive    */
/*      in progress, no DMA chan available                                   */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function uses DMA                                                 */
/*  - each individual transfer is 32bits in size so num_bytes must be a      */
/*      multiple of four and p_buffer must be 32bit aligned                  */
/*  - if a close is called during a pending async operation, the operation   */
/*      is aborted and the callback is called with an error status.          */
/*  - only one FIFO receive operation is supported at a time, but it can be  */
/*      concurrent with a FIFO send operation                                */
/*                                                                           */
/*****************************************************************************/
int pci_fifo_async_receive( int chan, unsigned int *p_buffer,
                       unsigned int num_bytes, pci_fifo_callback *p_callback );


/*****************************************************************************/
/*  int pci_fifo_sync_receive( int chan, unsigned int *p_buffer,             */
/*      unsigned int num_bytes )                                             */
/*                                                                           */
/*  This routine retrieves data from the FIFO.  It will return when the      */
/*  transfer is complete.                                                    */
/*                                                                           */
/*  Parameters:                                                              */
/*  - chan parameter is the channel number from a successful open            */
/*  - p_buffer is the location of the buffer to be filled with the data      */
/*      read from the FIFO, this address must be 32 bit aligned              */
/*  - num_bytes is the number of bytes of data to be read from the FIFO,     */
/*      this number must be a multiple of 4                                  */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: chan not open, another receive    */
/*      in progress                                                          */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function does not use DMA, it polls the fifo flags and reads      */
/*      data from the fifo directly                                          */
/*  - each individual transfer is 32bits in size so num_bytes must be a      */
/*      multiple of four and p_buffer must be 32bit aligned                  */
/*                                                                           */
/*****************************************************************************/
int pci_fifo_sync_receive( int chan, unsigned int *p_buffer,
                          unsigned int num_bytes );


/*****************************************************************************/
/*  int pci_fifo_receive( int chan, unsigned int *p_buffer,                  */
/*      unsigned int *p_num_bytes )                                          */
/*                                                                           */
/*  This routine retrieves data from the FIFO.  It will return when there    */
/*  is no more data in the FIFO.  The p_num_bytes location will be updated   */
/*  with the actual amount of data transferred                               */
/*                                                                           */
/*  Parameters:                                                              */
/*  - chan parameter is the channel number from a successful open            */
/*  - p_buffer is the location of the buffer to be filled with the data      */
/*      read from the FIFO, this address must be 32 bit aligned              */
/*  - p_num_bytes is a pointer to the number of bytes of data to be read     */
/*      from the FIFO, this number must be a multiple of 4                   */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: chan not open, another receive    */
/*      in progress                                                          */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function does not use DMA, it polls the fifo flags and reads      */
/*      data from the fifo directly                                          */
/*  - each individual transfer is 32bits in size so num_bytes must be a      */
/*      multiple of four and p_buffer must be 32bit aligned                  */
/*                                                                           */
/*****************************************************************************/
int pci_fifo_receive( int chan, unsigned int *p_buffer,
                          unsigned int *p_num_bytes );


/*****************************************************************************/
/*  int pci_message_send( unsigned int message )                             */
/*                                                                           */
/*  This routine sends a 32bit message.  If the message can not be placed    */
/*  into the mailbox immediately, it returns with an error and the message   */
/*  is not sent.                                                             */
/*                                                                           */
/*  Parameters:                                                              */
/*  - message is the 32bit value to be sent to the host                      */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR, possible error conditions include: outgoing       */
/*      message mailbox not empty, HINT not clear                            */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function checks mailbox empty/full flags and HINT bit then if     */
/*      mailbox 1 is empty and HINT is clear it places message into          */
/*      mailbox 1 then sets the HINT bit to cause an interrupt to the host   */
/*                                                                           */
/*****************************************************************************/
int pci_message_send( unsigned int message );


/*****************************************************************************/
/*  int pci_message_async_send( unsigned int message, int wait_for_ack,      */
/*      pci_msg_callback *p_callback )                                       */
/*                                                                           */
/*  This routine will begin a send message operation.  The call will return  */
/*  immediately.  The callback will be called when the operation is          */
/*  complete.                                                                */
/*                                                                           */
/*  Parameters:                                                              */
/*  - message is the 32bit value to be sent to the host                      */
/*  - wait_for_ack determines when the operation is considered complete      */
/*      and the callback function is called.                                 */
/*  - p_callback is the funciton pointer for the callback routine            */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: another send in progress          */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function uses interrupts internally, it does not poll             */
/*  - if wait_for_ack is TRUE then callback is not called until the          */
/*      message has been read by the host, if it is FALSE then callback      */
/*      is called as soon as the message is placed into the mailbox          */
/*                                                                           */
/*****************************************************************************/
int pci_message_async_send( unsigned int message, int wait_for_ack,
                           pci_msg_callback *p_callback );


/*****************************************************************************/
/*  int pci_message_sync_send( unsigned int message, int wait_for_ack )      */
/*                                                                           */
/*  This routine will send a 32bit message to the host.  It will not         */
/*  return until the operation is complete.                                  */
/*                                                                           */
/*  Parameters:                                                              */
/*  - message is the 32bit value to be sent to the host                      */
/*  - wait_for_ack determines when the operation is considered complete      */
/*      and the callback function is called.                                 */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: another send in progress          */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function implemented by calling pci_message_async_send() and      */
/*      waiting internally for the operation to complete.                    */
/*  - if wait_for_ack is TRUE then the operation is not complete until the   */
/*      message has been read by the host, if it is FALSE then the operation */
/*      is complete as soon as the message is placed into the mailbox        */
/*                                                                           */
/*****************************************************************************/
int pci_message_sync_send( unsigned int message, int wait_for_ack );


/*****************************************************************************/
/*  int pci_message_retrieve( unsigned int *p_message )                      */
/*                                                                           */
/*  This routine retrieves a message that the host has sent.  If there is    */
/*  not a message available it returns ERROR.                                */
/*                                                                           */
/*  Parameters:                                                              */
/*  - p_message is the location to store the 32bit value sent by the host    */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: incoming message mailbox not full */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function checks mailbox empty/full flags then if mailbox 1 is     */
/*      full the message is read from the mailbox 1 register                 */
/*                                                                           */
/*****************************************************************************/
int pci_message_retrieve( unsigned int *p_message );



/*****************************************************************************/
/*  int pci_message_async_retrieve( unsigned int *p_message,                 */
/*      pci_msg_callback *p_callback )                                       */
/*                                                                           */
/*  This routine begins an asynchronous message retrieve operation.  It      */
/*  returns immediately.  When the operation is complete, the callback       */
/*  function is called.                                                      */
/*                                                                           */
/*  Parameters:                                                              */
/*  - p_message is the location to store the 32bit value sent by the host    */
/*  - p_callback is the funciton pointer for the callback routine            */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: another retrieve in progress      */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function uses interrupts internally, it does not poll             */
/*                                                                           */
/*****************************************************************************/
int pci_message_async_retrieve( unsigned int *p_message,
                               pci_msg_callback *p_callback );


/*****************************************************************************/
/*  int pci_message_sync_retrieve( unsigned int *p_message )                 */
/*                                                                           */
/*  This routine will retrieve a 32bit message sent by the host.  It will    */
/*  not return until the operation is complete.                              */
/*                                                                           */
/*  Parameters:                                                              */
/*  - p_message is the location to store the 32bit value sent by the host    */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include:another retrieve in progress       */
/*                                                                           */
/*  Notes:                                                                   */
/*  - this function is implemented by calling pci_message_async_retrieve()   */
/*      and waiting internaly for the operation to complete                  */
/*                                                                           */
/*****************************************************************************/
int pci_message_sync_retrieve( unsigned int *p_message );



/*****************************************************************************/
/*  int amcc_nvram_read( unsigned short offset, unsigned char *p_data )      */
/*                                                                           */
/*  This routine reads the byte in NVRAM at the offset requested.  The       */
/*  data is then placed into the location indicated.                         */
/*                                                                           */
/*  Parameters:                                                              */
/*  - offset parameter is the address offset into the NVRAM device           */
/*  - p_data is the location to store the 8bit value read                    */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: offset out of range               */
/*                                                                           */
/*  Notes:                                                                   */
/*  - nvram device on the EVM board is 2K bytes                              */
/*                                                                           */
/*  WARNING:  Care should be taken that NVRAM read and/or write operations   */
/*            do not happen at the same time from both the host and the      */
/*            DSP.  Simultaneous access to NVRAM will result in invalid      */
/*            operations and possibly corrupt data stored in NVRAM.          */
/*                                                                           */
/*****************************************************************************/
int amcc_nvram_read( unsigned short offset, unsigned char *p_data );



/*****************************************************************************/
/*  int amcc_nvram_write( unsigned short offset, unsigned char data )        */
/*                                                                           */
/*  This routine will write the byte of data to NVRAM at the indicated       */
/*  offset.  This routine will not allow the modification of data between    */
/*  offsets of 0x0000 and 0x007f.                                            */
/*                                                                           */
/*  Parameters:                                                              */
/*  - offset parameter is the address offset into the NVRAM device           */
/*  - data parameter is the 8bit value to be written to NVRAM                */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: invalid offset, offset out        */
/*      of range                                                             */
/*                                                                           */
/*  Notes:                                                                   */
/*  - offsets 0 thru 0x7f are used for configuration and are not allowed     */
/*      to be modified.                                                      */
/*  - nvram device on the EVM board is 2K bytes                              */
/*  - implemented by calling amcc_nvram_write_full() after checking          */
/*      for invalid offset                                                   */
/*                                                                           */
/*  WARNING:  Care should be taken that NVRAM read and/or write operations   */
/*            do not happen at the same time from both the host and the      */
/*            DSP.  Simultaneous access to NVRAM will result in invalid      */
/*            operations and possibly corrupt data stored in NVRAM.          */
/*                                                                           */
/*****************************************************************************/
int amcc_nvram_write( unsigned short offset, unsigned char data );



/*****************************************************************************/
/*  int amcc_mailbox_read( int mailbox_number, unsigned int *p_data )        */
/*                                                                           */
/*  This routine will read the contents of one of the mailbox registers      */
/*  not used by the pci_message_???() calls. If the indicated mailbox is not */
/*  full this routine will return ERROR.                                     */
/*                                                                           */
/*  Parameters:                                                              */
/*  - mailbox_number parameter is the mailbox register number to be          */
/*      checked.  It must be a value of 2, 3 or 4.                           */
/*  - p_data is the location to store the 32bit value sent by the host       */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: invalid mailbox number (must      */
/*      be 2, 3 or 4), mailbox not full                                      */
/*                                                                           */
/*  Notes:                                                                   */
/*  - mailbox register 1 is used for the pci_message_xxx() calls so it       */
/*      is not available to this routine                                     */
/*                                                                           */
/*****************************************************************************/
int amcc_mailbox_read( int mailbox_number, unsigned int *p_data );


/*****************************************************************************/
/*  int amcc_mailbox_write( int mailbox_number, unsigned int data )          */
/*                                                                           */
/*  This routine will place a 32bit word into one of the mailbox registers.  */
/*  not used by the pci_mesage_???() calls. If the indicated mailbox is not  */
/*  empty, this routine will return ERROR.                                   */
/*                                                                           */
/*  Parameters:                                                              */
/*  - mailbox_number parameter is the mailbox register number to be          */
/*      checked.  It must be a value of 2, 3 or 4.                           */
/*                                                                           */
/*  Return:                                                                  */
/*  - returns OK or ERROR,                                                   */
/*      possible error conditions include: invalid mailbox number (must      */
/*      be 2, 3 or 4), mailbox not empty                                     */
/*                                                                           */
/*  Notes:                                                                   */
/*  - byte 3 of outgoing mailbox register 4 is not writable, writing to      */
/*      this byte will have no effect                                        */
/*  - on the host side, byte 3 of incoming mailbox register 4 contains       */
/*      hardware signal information, see the EVM reference guide for         */
/*      details                                                              */
/*  - mailbox register 1 is used for the pci_message_xxx() calls so it       */
/*      is not available to this routine                                     */
/*                                                                           */
/*****************************************************************************/
int amcc_mailbox_write( int mailbox_number, unsigned int data );


/*****************************************************************************/
/* pci_set_base() - set base addresses of S5933 PCI controller               */
/*                                                                           */
/*****************************************************************************/
void pci_set_base(int mapMode,       /* IN: mapMode (0 or 1)                 */
                  int littleEndian   /* IN: T/F                              */
                 );


#endif  /* end of ifndef _PCI_H_ */