/* * This GEL file (evmc6701.gel) may be loaded by Code Composer on the * command line (It can be attached to the CC icon by right clicking * the icon and selecting "Properties", selecting the "Shortcut" tab, * and appending the path to the GEL file to the "Target" line.) * It provides example code on how to reset the C6701 DSP, initialize * the External Memory Interface (EMIF), and set the Code Composer * Studio memory map. This file is configured for the 100 MHz, memory * map 1 EVM options. * * This file is based on the CCS 2 files EVM6201_6701.gel and * mem_map.gel in the ti\cc\gel directory. * * This gel file works with Code Composer Studio version 2.00 */ /* * New GEL commands for 2.00 *********************************************************************** * OnPreFileLoaded() * If defined, this is executed before all file loads * * OnFileLoaded(int nErrorCode, int bSymbolsOnly) * If defined, this is executed after all file loads * * OnReset(int nErrorCode) * If defined, this is executed after "Reset DSP' * * OnRestart(int nErrorCode) * If defined, this is executed after "Restart' *********************************************************************** */ /* * The StartUp() function is called every time you start * Code Composer. You can customize this function to * initialize wait states in the EMIF or to perform * other initialization. */ StartUp() { setup_memory_map(); GEL_Reset(); emif_init(); } /* * OnReset(int nErrorCode) * If defined, this is executed after "Reset DSP' */ OnReset(int nErrorCode){ GEL_BreakPtReset(); emif_init(); } emif_init() { /*---------------------------------------------------------------------------*/ /* EMIF REGISTERS */ /*---------------------------------------------------------------------------*/ #define EMIF_GCTL 0x01800000 #define EMIF_CE1 0x01800004 #define EMIF_CE0 0x01800008 #define EMIF_CE2 0x01800010 #define EMIF_CE3 0x01800014 #define EMIF_SDRAMCTL 0x01800018 #define EMIF_SDRAMREF 0x0180001c /************************************************************* * Edit values below to conform to your specifications * The following assumes the EVM6201/6701 memory configuration *************************************************************/ /* For 100 MHz, Map 1 */ *(int *)EMIF_GCTL = 0x3065; /* For 133 MHz, map 1 */ /* *(int *)EMIF_GCTL = 0x3061; */ /* CE1 */ *(int *)EMIF_CE1 = 0x40f40323; /* CE0 SBSRAM */ *(int *)EMIF_CE0 = 0x40; /* CE2 and CE3 SDRAM */ *(int *)EMIF_CE2 = 0x30; *(int *)EMIF_CE3 = 0x30; /* 100 MHz (Use 0x7116000 for 133 MHz) */ *(int *)EMIF_SDRAMCTL = 0x7114000; /* 100 MHz ( use 0x410 for 133 MHz */ *(int *)EMIF_SDRAMREF = 0x30d; } /* * This GEL function sets the Memory Map in Code Composer * * Memory Map will keep Code Composer from reading * or writing outside the defined memory regions. * * The following is the setup for the C6x01 EVM MEMORY MAP */ menuitem "Memory Map"; hotmenu Set_Memory_Map() { setup_memory_map(); } hotmenu Clear_Memory_Map() { clear_memory_map(); } /* * Clear the memory map settings */ clear_memory_map() { GEL_MapOff(); } /* * Setup the memory map for the EVM6x */ setup_memory_map() { /* enable the memory map feature in Code Composer Studio */ GEL_MapOn(); /* start out by resetting all memory to unreadable and unwritable */ GEL_MapReset(); /* the syntax for GEL_MapAdd(address, page, length, readable, writeable) * page: Program Memory = 0, Data Memory = 1, I/O Space = 2 * readable: Not Readable = 0, Readable = 1 * writeable: Not Writeable = 0, Writeable = 1 */ /* C6x01 MAP0-specific memory mapping */ /*------------------------------------*/ /* 0x00000000 is CE0 space - SBSRAM */ /* 0x01300000 is CE1 space - PCI add-on registers */ /* 0x01310000 is CE1 space - PCI FIFO */ /* 0x01320000 is CE1 space - Audio codec registers */ /* 0x01380000 is CE1 space - CPLD (DSP memory-mapped) registers */ /* 0x01400000 is Internal program RAM */ /*------------------------------------*/ /* GEL_MapAdd(0x00000000,0,0x40000,1,1); * GEL_MapAdd(0x01300000,0,0x40,1,1); * GEL_MapAdd(0x01310000,0,0x4,1,1); * GEL_MapAdd(0x01320000,0,0x10,1,1); * GEL_MapAdd(0x01380000,0,0x20,1,1); * GEL_MapAdd(0x01400000,0,0x10000,1,1); */ /* C6x01 MAP1-specific memory mapping */ /*------------------------------------*/ /* 0x00000000 is Internal program RAM */ /* 0x00400000 is CE0 space - SBSRAM */ /* 0x01700000 is CE1 space - PCI add-on registers */ /* 0x01710000 is CE1 space - PCI FIFO */ /* 0x01720000 is CE1 space - Audio codec registers */ /* 0x01780000 is CE1 space - CPLD (DSP memory-mapped) registers */ /*------------------------------------*/ GEL_MapAdd(0x00000000,0,0x10000,1,1); GEL_MapAdd(0x00400000,0,0x40000,1,1); GEL_MapAdd(0x01700000,0,0x40,1,1); GEL_MapAdd(0x01710000,0,0x4,1,1); GEL_MapAdd(0x01720000,0,0x10,1,1); GEL_MapAdd(0x01780000,0,0x20,1,1); /* C6x01 not map-specific memory mapping */ /*---------------------------------------*/ /* 0x02000000 is CE2 space - SDRAM */ /* 0x03000000 is CE3 space - SDRAM */ /* 0x80000000 is Internal data RAM */ /* 0x01800000 is EMIF control registers */ /* 0x01840000 is DMA control registers */ /* 0x01880000 is HPI registers */ /* 0x018c0000 is McBSP0 registers */ /* 0x01900000 is McBSP1 registers */ /* 0x01940000 is Timer0 registers */ /* 0x01980000 is Timer1 registers */ /* 0x019c0000 is Interrupt selector registers */ /*---------------------------------------*/ GEL_MapAdd(0x02000000,0,0x400000,1,1); /* CE2 space - SDRAM */ GEL_MapAdd(0x03000000,0,0x400000,1,1); /* CE3 space - SDRAM */ GEL_MapAdd(0x80000000,0,0x10000,1,1); /* Internal data RAM */ GEL_MapAdd(0x01800000,0,0x20,1,1); /* EMIF control registers */ GEL_MapAdd(0x01840000,0,0x74,1,1); /* DMA control registers */ GEL_MapAdd(0x01880000,0,0x4,1,1); /* HPI registers */ GEL_MapAdd(0x018c0000,0,0x28,1,1); /* McBSP0 registers */ GEL_MapAdd(0x01900000,0,0x28,1,1); /* McBSP1 registers */ GEL_MapAdd(0x01940000,0,0xc,1,1); /* Timer0 registers */ GEL_MapAdd(0x01980000,0,0xc,1,1); /* Timer1 registers */ GEL_MapAdd(0x019c0000,0,0xc,1,1); /* Interrupt selector registers */ }