INTRODUCTION TO THE TMS320C6x VLIW DSP

6/22/99


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Table of Contents

INTRODUCTION TO THE TMS320C6x VLIW DSP

Outline

Instruction Set Architecture

Instruction Set Architecture

Functional Units

Restrictions on Register Accesses

Disadvantages

TMS320C62x Fixed-Point Processors

Example: Vector Dot Product

Example: Vector Dot Product

Example: Vector Dot Product

PPT Slide

Pipelining

Pipelining

TMS320C6x Pipeline

Program Fetch (F)

Decode Stage (D)

Execute Stage (E)

Execute stage (E)

Vector Dot Product with Pipeline Effects

Fetch packet

Dispatch

Decode

Execute (E1)

Execute (MVK done LDH in E1)

Vector Dot Product with Pipeline Effects

Optimized Vector Dot Product

PPT Slide

TMS320C62x vs. StarCore S140

Conclusion

Conclusion

Author: cdi.ditc

Email: bevans@ece.utexas.edu

Home Page: http://www.ece.utexas.edu/~bevans

Other information:
Prof. Brian L. Evans