Restrictions on Register Accesses
Each function unit has read/write ports
- Data path 1 (2) units read/write A (B) registers
- Data path 2 (1) can read one A (B) register per cycle
40 bit words stored in adjacent even/odd registers
- Used in extended precision accumulation
- One 40-bit result can be written per cycle
- A 40-bit read cannot occur in same cycle as 40-bit write
Two simultaneous memory accesses cannot use registers of same register file as address pointers
No more than four reads per register per cycle