SIGNAL PROCESSING ON THE TMS320C6X VLIW DSP
Outline
TMS320C6x Processor
Signal Flow Graph Notation
FIR Filter
Optimized Vector Dot Product on the C6x
FIR Filter Implementation on the C6x
Discrete Cosine Transform (DCT)
A Fast DCT Implementation
Bit Reversed Sorting on the C6x
Linear-Time Bit-Reversed Sorting
Lookup Table Bit-Reversed Sorting
Better Lookup Table Bit-Reversed Sorting
Assembly Optimizations
C6x C Compiler
Efficient Use of C Data Types
Volatile Declarations
Software Pipelining
Trip Count and Redundant Loops
Specifying Minimum Iteration Count
Software Pipelining Limitations
C Compiler Efficiency
Conclusion
Email: bevans@ece.utexas.edu
Home Page: http://www.ece.utexas.edu/~bevans
Other information: Prof. Brian L. Evans