IMAGE PROCESSING ON THE TMS320C6X VLIW DSP

Table of Contents

IMAGE PROCESSING ON THE TMS320C6X VLIW DSP

Outline

Introduction

Introduction

Introduction

2-D FIR Filter

2-D Filter Implementations

2-D FIR Implementation #1 on C6x

2-D FIR Implementation #2 on C6x

2-D FIR Implementation #3 on C6x

2-D FIR Implementation #3 on C6x (cont.)

JPEG

Discrete Cosine Transform (DCT)

JPEG Codec Benchmarking on C6x

JPEG Codec Benchmarking on C6x

Assembler, Compiler, and Simulator

Code Composer Environment

Development Boards

Spectrum Daytona C6x Board

TI C6x Evaluation Module

Conclusion

Conclusion

Email: bevans@ece.utexas.edu

Home Page: http://www.ece.utexas.edu/~bevans

Other information:
Prof. Brian L. Evans