IMAGE PROCESSING ON THE TMS320C8X MULTIPROCESSOR DSP

7/13/99


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Table of Contents

IMAGE PROCESSING ON THE TMS320C8X MULTIPROCESSOR DSP

Outline

C80 Architecture

C80 Architecture

Master Processor

PPT Slide

Register Scoreboarding

Master Processor Floating-Point Pipelines

Master Processor Floating-Point Pipelines

Parallel Processors

PPT Slide

Parallel Processors

Parallel Processor Instruction Set

Parallel Processor Instruction Set

Parallel Processor Instruction Set

Parallel Processor Parallel Data Transfers

Parallel Processor Addressing Modes

Parallel Processor Transfer Examples

Multitasking Executive

Flow of Data and Control

Host Communications

Parallel Processor Processing Flow

Intertask Communication in Kernel

The Kernel (cont.)

Task Scheduling

Parallel Processor Command Interface

Matrox Genesis Board

Programming the C80

Steps in Using the Genesis Native Library

Programming on the Host

Programming on the Host

Initializing the Task Table

Programming the Master Processor

Programming the Master Processor

Initializing Parallel Processors

Programming the Parallel Processors

Optimizations using the Native Library

Genesis Native Library Benchmarks

Conclusion

Author: cdi.ditc

Email: bevans@ece.utexas.edu

Home Page: http://www.ece.utexas.edu/~bevans

Other information:
Prof. Brian L. Evans