This research is focused on developing a fixed-point transformation
framework that includes wordlength optimization.
The primary contributions of this research are the following [1]:
- Development of wordlength optimization algorithms with search
methods for multiple objectives as well as a single objective.
We have developed fast search algorithms for a single objective
utilizing gradient information to find data wordlength.
We have also developed search algorithms for multiple objectives
employing genetic and evolutionary algorithms to optimize the
signal quality vs. implementation complexity tradeoffs.
- Development of low-power signal processing methods for embedded
hardware and software.
We have proposed wordlength reduction techniques to reduce power
consumption, and we have derived an expected value of
switching activity in wordlength reduction techniques.
The reduction in dynamic power consumption on FPGAs is estimated.
- Development of an automated floating-point to fixed-point
transformation environment.
We have proposed a transformation structure for this environment and
develop transformation software, including a code generator and
wordlength searchers.
This software can automatically transform any floating-point
program of digital signal processing to a fixed-point program.
Software for this automatic
transformation is available.
Reference
- Kyungtae Han,
Automating Transformations from
Floating-point to Fixed-point for Implementing
Digital Signal Processing Algorithms,
Dept. of Electrical and Computer Engineering,
The University of Texas at Austin, Austin, TX 78712, August 2006.
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