Brief Bio

I received my Ph.D., S.M. and S.B. degrees from the Department of Electrical Engineering and Computer Science at the Massachusetts Institute of Technology.  There I was a member of the Computation Structures Group within the Laboratory of Computer Science (now combined with the former Artificial Intelligence Laboratory to form CSAIL.)  My Ph.D. advisors were Professor Arvind and Dr. Larry Rudolph.  My research interests at MIT were parallel computer architecture, computer architecture, simulation, parallel run-time systems and compilers.  I was an architect of the StarT-Voyager machine as well as the StarT-NG machine.  I am a research affilate of CSAIL. 

After completing my Ph.D. and before coming to UT, I was a system architect at Avici Systems, a company that designs high-end, scalable core routers.  Our routers are extremely scalable, capable of Terabit front panel capacities, and are extremely reliable.  They mad3 up AT&T's core backbone network for seven years.  I worked in the system architecture team that was responsible for overall system architecture, component architecture and software architecture.  I lead all of Avici's architectural simulation efforts, architected traffic managers and helped with switch fabric and network processor architecture.

I was a member of the Board of Directors of Dharmacon, a company that produces siRNA and custom RNA oligos, until the company was acquired by Fisher Scientific in 2004.  I developed the original database system that managed Dharmacon's operations from synthesis and quality assurance to quote generation, shipping/invoicing and customer service.

For some reason, I've done a lot of conference organization.  I was the general chair of the IEEE International Symposium on Workload Characterization (IISWC) in 2009. 

I was the local arrangements chairperson of the High Performance Computer Architecture (HPCA) conference held in Austin, Texas in February of 2006.  Our banquet was at the SaltLick.  I was the finance chairperson of the International Conference on Supercomputing (ICS) held in Seattle in 2007 and the ICS held in Cambridge, Massachusetts in June of 2005 as well as ASPLOS IX that was held in Cambridge, Massachusetts in November 2000.  I was a founder and an organizer of three Computer Architecture Research Directions (CARD) Workshops held in conjuction with HPCA-13 and ISCA 2011 and ISCA 2009.  I was an organizer of the first and second Workshop on Architectural Research using FPGA Platforms held in conjunction with HPCA-11 and  HPCA-12 respectively.   I was on a lot of program committees including FPGA 2012 and 2011, IEEE Micro Top Picks 2011 and 2009, ASP-DAC 2012, HPCA-12, SuperComputing 2007, ICS 2005, 2006 and 2007, ICCD 2007, and am currently on the Board of Distinguished Reviewers for ACM's Transactions on Architecture and Code Optimization (TACO).

I taught a one week summer course at the ACACES 2010 Sixth International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems in Terrassa, Spain.